The complexity of the semiconductor‐dielectric system behavior under high electric fields is discussed. Time dependence of the voltage drop, electrical current, and light emissions, and the strong influence of the nature and quality of the surrounding dielectric, as well as the quality of the semiconductor processing and contacts, are analyzed for high‐purity bulk silicon‐dielectric vacuum or gas systems under impulse voltage stress. On the basis of the analysis of the main characteristics of the time response of the system up to breakdown, as well as of the variation of the current components with the applied voltage, a new comprehensive physical model of the prebreakdown and breakdown phenomena in the high‐field semiconductor‐dielectric systems is proposed. The model points out the active behavior of two parts, the semiconductor and the ambient dielectric, and the main role of the semiconductor in the initiation of the breakdown phenomena in the system. Based on a large number of experimental results, t...

Prebreakdown and breakdown phenomena in high‐field semiconductor‐dielectric systems

At this time, little importance is given to the surface component of reverse leakage current of silicon pn-junctions although reliability issues reveal device blocking weakness when performing at high voltage and temperature. Junctions which have almost the same perimeter but different area have been realized and their reverse current has been measured at room temperature and high temperature both for standard recovery and fast recovery (gold-doped or electron irradiated) pn-junctions. It is shown that for standard recovery junctions the surface component of the reverse current is the primary component from room temperature up to above 150/spl deg/C and has influence on reaching high permissible working voltages. For gold-doped or electron irradiated junctions, the bulk component is dominant at high junction temperature, but it is shown that a comparatively negligible surface component can impose lower reverse working voltages or lower junction operation temperature. The surface component may be a cause of limitation on the operation of power silicon diodes at high reverse voltage above 175-200/spl deg/C junction temperature.

An experimental investigation on the nature of reverse current of silicon power pn-junctions

Silicon Power Field Controlled Devices and Integrated Circuits

Photoconductive and other types of semiconductor switches hold great promise for use in high voltage switching applications requiring reliability, light weight, and system simplicity. At present, the utility of these devices is sharply limited by the occurrence of surface flashover at the semiconductor-ambient interface at voltages roughly an order of magnitude below that expected on the basis of the bulk dielectric strength of the material. The physical mechanisms responsible for this flashover are not understood, but recent empirical evidence suggests that the problem can be overcome, and that although the actual flashover appears to occur in the ambient, the processes responsible for initiating flashover occur inside the semiconductor. We propose a model for surface flashover based on band bending at the semiconductor-ambient interface.

A mechanism for surface flashover of semiconductors

Symmetric blocking power semiconductor switches require positive-bevel edge terminations for the reverse blocking p-n junction. This technique has been extensively applied to silicon wafer-size devices with high current ratings. In this letter, we propose and experimentally demonstrate, for the first time, that an orthogonal positive-bevel termination can be used for the reverse blocking junction of chip-size SiC devices. The edge termination was formed by sawing the SiC wafer with a V-shaped dicing blade. For proof of concept, our experiment was done on a SiC wafer with a 15.8-μm 6.1 × 1015 cm-3 p-type epitaxial layer grown on an N+ substrate. The positive-bevel termination resulted in a breakdown voltage of over 1000 V as limited by reach-through breakdown even without removal of damage from the sawing. The leakage current was found to be reduced by two orders of magnitude after reactive ion etching of the SiC bevel surface to remove the sawing damage.

Orthogonal Positive-Bevel Termination for Chip-Size SiC Reverse Blocking Devices

A theoretical analysis is made of the field distribution near the surface of p-n-p structures with double positive edge geometry. This geometry offers in principle the possibility of avoiding the limitations and disadvantages inherent in the use of negative bevel angles. The results show that the reduction of the maximum field at the surface is not as easy as for the case of a simple positive bevel angle and that consequently the passivation of the surface may present more problems. Nevertheless, it is demonstrated that this geometry offers a number of great advantages and presents a real alternative for use in future high-voltage devices. A number of devices, dimensioned for a breakdown voltage of 6 kV, were made with this edge geometry. The measurements show that the reverse current corresponds to the thermally generated current in the space-charge layer and that no significant current flows at the surface. The breakdown voltage corresponds to the theoretical breakdown voltage in the bulk, unlike in the case of double negative beveling. The advantages of this geometry with respect to the conventional negative bevel angle are no significant reduction of active area, no dependence on the doping profile, and no limitation in voltage. A disadvantage, however, is the presence of higher fields at the surface.

S. Schweitzer

Papers

Double positive beveling: A better edge contour for high-voltage devices