The implementation of a viable statistical circuit design methodology requiring detailed knowledge of the variabilities of, and correlations among, the circuit simulator model parameters utilized by designers, and the determination of the important relationships between these CAD model parameter variabilities and the process variabilities causing them is presented. This work addresses the above requirements by detailing a new framework which was adopted for a 2-/spl mu/m CMOS technology to enable realistic statistical circuit performance prediction prior to manufacture. Issues relating to MOSFET modeling, the derivation of fast "direct" parameter extraction methodologies suitable for rapid parameter generation, the employment of multivariate statistical techniques to analyze statistical parametric data, and the linking of the CAD model parameter variations to variabilities in process quantities are discussed. In this approach the correlated set of model parameters is reduced to a smaller and more manageable set of uncorrelated process-related factors. The ensuing construction and validation of realistic statistical circuit performance procedures is also discussed. Comparisons between measured and simulated variabilities of device characteristics is utilized to demonstrate the accuracy of the techniques described. The advantages of the proposed approach over more traditional "worst case" design methodologies are demonstrated. >

/pdf/relating-statistical-mosfet-model-parameter-variabilities-to-ssa2acxs4k.pdf

Relating statistical MOSFET model parameter variabilities to IC manufacturing process fluctuations enabling realistic worst case design

A general, direct parameter extraction algorithm that uses a small number of data points has been developed for MOS transistor models. This extraction algorithm has been tested using two transistor models in SPICE, MOS3, and BSIM. The basic idea of the algorithm is to use only one data point for each transistor parameter. Appropriate selection of the data points ensures physically reasonable values of most extracted parameters. Analytical expressions or rapidly converging numerical equations are used to calculate the parameters. Interaction between different parameters are taken into account. Good agreement between measured and simulated data is obtained from only 15 and 25 data points for MOS3 and BSIM, respectively. The total extraction time for a single transistor is around 40 s for MOS3 and 1 min for BSIM. >

An efficient parameter extraction algorithm for MOS transistor models

A combinatorial optimization method is applied to the problem of device model optimization. A heuristic optimization technique called simulated annealing is applied to optimize the model parameters so that the device can be accurately simulated by the resulting model. This method avoids entrapment in the local minima of the objective function. Another application of this optimization process is to provide useful device parameters for a device process engineer. The effectiveness of this approach has been demonstrated by results from three test cases. >

Modeling of microwave semiconductor devices using simulated annealing optimization

An enhanced SPICE MOSFET circuit simulator model is presented and shown to be very effective in simulating device characteristics. During formulation of the model, special attention was given to its ability to accurately simulate device output conductance and transconductance; thus the emphasis was on ensuring the model's suitability for analog as well as digital purposes. Parameter extract procedures using both directed nonlinear least-squares strategies and direct extraction methods with straightforward analytical equation solving were developed for the model. These procedures are described, and the accuracy and suitability of the direct methods are assessed. Comparisons between the results obtained using these methods and the more general parameter optimization schemes demonstrate that the direct parameter extraction procedure can be almost as accurate as the optimization methods providing the data used are chosen carefully. >

Enhanced SPICE MOSFET model for analog applications including parameter extraction schemes

Unrealistic parameter values and poor experimental agreement are two problems often encountered using the MOS3 model in SPICE2. The source of the discrepancy is attributed to MOS3's simplified treatment of the mobility degradation phenomenon, which generally results in an artifically exaggerated value for the carrier velocity. Practically, this discrepancy can be eliminated by introducing a new empirical factor (DEL) into the mobility model, thereby permitting SPICE users to accurately simulate both triode and saturation regions of p- and n-channel transistors. DEL is determined using an extraction algorithm which systematically extracts MOS3 parameters and characterizes the extent of mobility degradation in the transistor's triode region.

Improved Simulation of p- and n-channel MOSFET's Using an Enhanced SPICE MOS3 Model

The method of extracting MOSFET model parameters using optimization offers significant advantages over classical methods of extracting model parameters sequentially. Previous work in this field has concentrated on speed of convergence rather than general applicability. Gradient following methods have been applied to this problem but difficulties arise because of parameter redundancy, singularities in the objective function, and the necessity of providing very good initial estimates of the model parameters. These factors can seriously hinder the application of the technique. This paper describes the application of the simplex direct search optimization method to this problem. This algorithm, in wide use for general optimization problems, needs no derivative calculation and has proved highly stable for MOS model parameter extraction. Its basis is described and an example of its use given.

S.U. Lidholm

Papers

Extraction of MOSFET Parameters Using the Simplex Direct Search Optimization Method