A semiconductor memory uses cells with a ferroelec­tric capacitor having one plate coupled to a bit line by a FET and another plate coupled to a plate line. A pulse on the plate line causes the bit line to change voltage based on the state of the cell. A dummy cell arrangement is disclosed using one capacitor per cell, and another embodi­ment uses two capacitors per cell with no dummy. The cells cooperate with a sense amplifier and timing signals so that they are self restoring.

Self restoring ferroelectric memory

Spontaneous polarization of ferroelectric materials has been for a long time proposed as binary information support, but it suffers so far from destructive readout. A nondestructive resistive readout of the ferroelectric polarization state in a metal–ferroelectric–metal capacitor would thus be advantageous for data storage applications. Combing conducting force microscopy and piezoelectric force microscopy, we unambiguously show that ferroelectric polarization direction and resistance state are correlated for epitaxial ferroelectric Pb(Zr0.2Ti0.8)O3 nanoscale capacitors prepared by self-assembly methods. For intermediate ferroelectric layer thickness (∼9 nm) sandwiched between copper and La0.7Sr0.3MnO3 electrodes we achieved giant electroresistance with a resistance ratio of >1500 and high switching current densities (>10 A/cm2) necessary for effective resistive readout. The present approach uses metal–ferroelectric–metal devices at room temperature and, therefore, significantly advances the use of ferroe...

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Room-temperature ferroelectric resistive switching in ultrathin Pb(Zr 0.2 Ti 0.8)O3 films.

A ferroelectric capacitor structure is designed for fabrication together with MOS devices on a semiconductor substrate. The ferroelectric capacitor includes a diffusion barrier layer above the surface of the substrate for preventing the materials of the ferroelectric capcacitor from contaminating the substrate or MOS devices. The ferroelectric capacitor comprises a bottom electrode, a thin film ferroelectric layer and a top electrode. An interlayer dielectric is formed to cover portions of the ferroelectric thin film and provide an opening therethrough for the top electrode. A ferroelectric memory cell comprises a field effect transistor together with a ferroelectric capacitor fabricated on a semiconductor substrate. In one configuration, the ferroelectric capacitor is offset from the field effect transistor, while in another configuration, the ferroelectric capacitor is substantially above the field effect transistor to provide greater density.

Ferroelectric capacitor and memory cell including barrier and isolation layers

A ferroelectric device that comprises a polarizing thin film of BaMF4 deposited on a substrate. Ba is barium, M is one of the metals of the group consisting of iron (FE), manganese (Mn), cobolt (Co), nickel (Ni), magnesium (Mg), and zinc (Zn). The substrate is silicon, sapphire, or gallium arsenide. A non-volatile NDRO and DRO memory cell and methods for depositing the thin film. A method of depositing bismuth titanate on a substrate are described.

Ferroelectric thin film material, method of deposition, and devices using same

A memory including an array of memory cells (20), each of which includes a ferroelectric field effect transistor (FET) as its memory element; and sense and refresh circuitry (32) connected to the array of memory cells to read stored data within each cell by sensing source-to-drain conductivity of the ferroelectric transistor and to refresh the stored data.

A ferroelectric dynamic random access memory

A ferroelectric memory device utilizing the remanent polarization of a thin, ferroelectric film to control the surface conductivity of a bulk semiconductor and perform the memory function. The structure of the device is similar to a conventional MIS field effect transistor with the exception that the gate insulating layer is replaced by a thin film of active ferroelectric material comprising a reversably polarizable dielectric exhibiting hysteresis.

S Wu

Papers

Ferroelectric memory device