This paper presents an overview on the IF toolset which is an environment for modelling and validation of heterogeneous real-time systems. The toolset is built upon a rich formalism, the IF notation, allowing structured automata-based system representations. Moreover, the IF notation is expressive enough to support real-time primitives and extensions of high-level modelling languages such as SDL and UML by means of structure preserving mappings.

The IF Toolset

Finite automata and regular languages have been useful in a wide variety of problems in computing, communication and control, including formal modeling and verification. Traditional automata do not admit an explicit modeling of time, and consequently, timed automata [2] were introduced as a formal notation to model the behavior of real-time systems. Timed automata accept timed languages consisting of sequences of events tagged with their occurrence times. Over the years, the formalism has been extensively studied leading to many results establishing connections to circuits and logic, and much progress has been made in developing verification algorithms, heuristics, and tools. This paper provides a survey of the theoretical results concerning decision problems of reachability, language inclusion and language equivalence for timed automata and its variants, with some new proofs and comparisons. We conclude with a discussion of some open problems.

Formal Methods for the Design of Real-Time Systems

Most of today's embedded systems are required to work in dynamic environments, where the characteristics of the computational load cannot always be predicted in advance. Still timely responses to events have to be provided within precise timing constraints in order to guarantee a desired level of performance. Hence, embedded systems are, by nature, inherently real-time. Moreover, most of embedded systems work under several resource constraints, due to space, weight, energy, and cost limitations imposed by the specific application. As a consequence, efficient resource management is a critical aspect in embedded systems, that must be considered at different architecture levels.The objective of this document is to present the major research trends identified by the international community on real-time systems to make the next generation embedded systems more predictable and adaptive to environmental changes. After describing the characteristics of modern embedded applications, the paper presents the problems of the current approaches and discusses the new research trends in operating systems and scheduling emerging to overcome them.

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Research trends in real-time computing for embedded systems

Model checking is a technique to automatically analyse systems that have been modeled in a formal language. The timed automaton framework is such a formal language. It is suitable to model many realistic problems in which time plays a central role. Examples are distributed algorithms, protocols, embedded software and scheduling problems. The main problem with model checking is the exponential growth of the state space as models become larger (also known as the 'state space explosion' problem). This thesis consists of six research papers. Three of these contribute theory to alleviate the state space explosion problem. The other three demonstrate the practical use of model checking technology by applying it to realistic case studies.

Model checking timed automata : techniques and applications

This paper presents an algorithm that allows one to create a static schedule of the Profinet IO IRT (Isochronous Real Time) communication, which is an industrial Ethernet protocol standardized in IEC 61158. This algorithm offers an alternative to the available commercial tool, providing comparable results with respect to the resulting schedule makespan. Furthermore, the problem is extended by useful temporal constraints (i.e., release dates, deadlines and end-to-end deadlines of the messages) providing a greater flexibility with respect to the individual messages. Due to this flexibility, it is possible to place the selected messages in various parts of the communication cycle (in order to increase the computational time available for the main-controller application, or to retransmit the synchronization message without holdup in the switch, or to add new messages into the original schedule). The solution is based on a formulation of the Profinet IO IRT scheduling problem in terms of the Resource Constrained Project Scheduling with Temporal Constraints.

Profinet IO IRT Message Scheduling With Temporal Constraints

We present a methodology for building timed models of real-time systems by adding time constraints to their application software. The applied constraints take into account execution times of atomic statements, the behavior of the system's external environment, and scheduling policies. The timed models of the application obtained in this manner can be analyzed by using time analysis techniques to check relevant real-time properties. We show an instance of the methodology developed in the TAXYS project for the modeling and analysis of real-time systems programmed in the Esterel language. This language has been extended to describe, by using pragmas, time constraints characterizing the execution platform and the external environment. An analyzable timed model of the real-time system is produced by composing instrumented C-code generated by the compiler. The latter has been re-engineered in order to take into account the pragmas. Finally, we report on applications of TAXYS to several nontrivial examples.

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S. Yovine

Papers

Building models of real-time systems from application software