A simplified and more accurate expression for the static I D − V D characteristics of hydrogenated amorphous silicon ( a -Si:H) thin-film transistors (TFT) has been derived. The results show that the experimental drain characteristics agree very well with the derived equations. This model shows its greatest improvement over other models at low values of gate voltage and at large values of drain voltage. The model is based on the experimental function for the channel conductance vs gate voltage. Four constants, obtained from the experimental data of I D vs V G at some small value of V D , are used to completely specify the simplified model. The theoretical results confirm the simple form of the model in terms of the device geometry. The constants calculated from the theory agree well with those extracted from the conductance data.

A simplified model for the static characteristics of amorphous silicon thin-film transistors

We calculate the dynamical behavior of a‐Si:H thin‐film transistors with an emphasis on the occupation dynamics of trap states. The appropriate rate equation for the occupation function of trap states is included. We show the relations of filling the trap states with the switch‐on time and of emptying the trap charges with the switch‐off time. The occupation functions in both cases are non‐Fermi distribution. The quasi‐equilibrium approximation underestimates those two time constants. Thus, transit time theory cannot describe the speeds of transistors made from disordered materials.

Occupation dynamics of trap states in an a-SI:H thin-film transistor

The effects of interface properties on the performance of thin‐film transistors are examined theoretically. The static characteristics, e.g., the off conductance and the on‐off ratio, and the dynamic response represented by the fraction of induced charge that is free, are considered. The interfaces, both at the gate side and the substrate side, are specified by the interface charge transfer (at equilibrium) from the semiconductor to the insulator, as well as the more familiar density of interface states. The properties of the two interfaces are found to control different regimes (high field and low field) of field‐effect conductance. Thus, by a careful tailoring of the two interfaces, and/or the two insulator materials, the transistor characteristics can be optimized.

The interface and the field effect in thin‐film transistors

It is shown that such detailed structures as the Ex and Ey peaks in N(E), the density of gap states, can theoretically be distinguished by the field effect technique. However the zero temperature approximation smoothes out almost all of the detailed structures of N(E). It also proves that, for an n-type sample, different choices of the parameters concerned, as well as systematic errors, have in a certain range little influence on the derived Ex peak. Random errors, however, even whose absolute values are less than 1% in the conductance G or less than 5% in the space charge differential capacitance Csc may cause the derived N(E) to fluctuate seriously, i.e., to yield spurious peaks.



Es wird gezeigt, das sich ausgepragte Strukturen, wie die Ex- und Ey-Maxima in N(E), der Dichte der Gapzustande, theoretisch durch Feldeffekttechnik unterscheiden lassen. Jedoch glattet die Null-Temperaturnaherung fast alle detailierten Strukturen von N(E). Es wird ebenfalls uberpruft, das fur eine n-leitende Probe sowohl unterschiedliche Wahl der Parameter als auch systematische Fehler in einem bestimmten Bereich nur einen geringen Einflus auf das abgeleitete Ex-Maximum haben. Zufallige Fehler jedoch, sogar solche deren absolute Werte weniger als 1% der Leitfahigkeit G oder weniger als 5% der differentiellen Raumladungskapazitan Csc betragen, konnen betrachtliche Fluktuationen des abgeleiteten N(E)-Verlauf verursachen, d. h. unechte Maxima ergeben.

Analysis for steady state field effect measurements on a‐Si:H Films

The field‐effect conductance of hydrogenated amorphous silicon thin‐film transistors has been calculated as a function of the gate voltage. This analysis differs from the existing ones in taking into account (1) the space charge due to excess free carriers, in addition to that caused by modulation of bulk localized state occupancy, and (2) the charge in the surface states in the determination of the boundary condition. Numerical results are presented to demonstrate the significance of these effects.

Sanboh Lee

Papers

New analysis of field‐effect conductance in hydrogenated amorphous silicon thin‐film transistors