An attempt is made to demonstrate that the problem of complete test set generation is amenable to the problem of pseudo-Boolean programming. For this purpose, various types of faults, viz., single faults, multiple faults, and bridging faults, are considered. The key issue is to obtain logical expressions for the primary output line in terms of different faulty internal nodes to find real transforms. Using standard rules, the real transforms of a Boolean function can be obtained directly without any algebraic manipulation. >

Translation of the problem of complete test set generation to pseudo-Boolean programming

This paper describes the optimal testing input sets required for fault diagnosis of nuclear power plant digital electronic circuits. With complicated systems such as very large scale integration (VLSI), nuclear power plant (NPP), and aircraft, testing is the major factor of the maintenance of the system. Particularly, the diagnosis time grows quickly with the complexity of the component. For a reduced diagnosis time we derived the optimal testing sets that are the minimal testing sets required for detecting the failure and for locating the failed component. For a reduced diagnosis time, the technique presented by Hayes (1971) fits best for our approach to testing set generation among many conventional methods. However, this method has the following disadvantages: a) it considers only a simple network; b) it concerns only whether the system is in a failed state or not and does not provide the way to locate the failed component. Therefore we have derived the optimal testing input sets that resolve these problems by Hayes while preserving its advantages. When we applied the optimal testing sets to the automatic fault diagnosis system (AFDS) which incorporates the advanced fault diagnosis method of the artificial intelligence technique, we found that fault diagnosis using the optimal testing sets makes testing of the digital electronic circuits much faster than that using exhaustive testing input sets; when we applied them to test the Universal (UV) Card which is a nuclear power plant digital input/output solid state protection system card, we reduced the testing time by up to about 100. >

Optimal testing input sets for reduced diagnosis time of nuclear power plant digital electronic circuits

The present paper describes a work on multiple fault detection in combinational network. It is being offered exclusively from the point of view of general interest and it will provide a good theore...

Characterization of Test Sets for Multiple Faults in Combinational Network

This letter describes a novel design of a combinational network to facilitate the single stuck-at fault detection problem. The design makes use of EXCLUSIVE-OR modules as control elements and the observability has been increased by providing an additional observable output which is the output of an additional AND gate in the network. Such a design of a combinational network with n primary input variables will require only (n + 1) predefined test input patterns belonging to the set T = {11...11,011...11,101 ...11, ........., 11 ... 110} for the detection of stuck-at single s-a-0 and s-a-1 fault on a line of the network. As a result, the extremely difficult task of test generation can be easily dispensed with.

A novel design of a combinational network to facilitate fault detection

This paper reports on the development of a novel scheme as an alternative to Susskind's method [A.K. Susskind, Testing by verifying Walsh coefficients, Proceedings of the 11th Annual Symposium on fault-tolerant computing, June 1981, pp. 206-208.] for detection of struck-at faults in combinational logic circuits. The main idea in the present scheme is to extend an existing design of the combinational network under test in minterm format by some logic checking the correctness of all input-output mappings by computing only one novel parameter after cycling through all 2n input combinations of a circuit with n inputs. Thus the present scheme uses 2n n-bit input patterns once to a circuit while Susskind's method uses twice that many. So it provides substantially less work than that needed in Susskind's method. Furthermore, the tester needed to implement the present scheme is a simplified version of that needed in Susskind's method.

Sanjoy Kumar Basu

Papers

Complete test-set generation for bridging faults in combinational-logic circuits