The hike in the use of the high-power utilization, the want for the multilevel inverter (MLI) came into picture. The multilevel inverters are designed so as to obtain higher levels of voltage using very less numbers of resources. So, the design of a hybrid reduced switch topology for the inverter started. Further sources are modified in order to obtain a very large level of voltage with a smaller number of sources. Similar effort is made to designed hybrid inverter structures for 9-level and 11-level multi-level inverters (MLIs) with significantly reduced numbers of power electronics devices and direct current power supplies. Further the topology is controlled and connected to grid using Phase Locked Loop (PLL) to analyze the performance of the inverter with the single-phase grid. A current controller is build using Proportional-Resonant (PR) controller to achieve proper integration of the MLI with the grid. The reference waveform obtained from the controller is used to achieve the inverter gate pulse using Level Shift Pulse Width Modulation (LS-PWM) technology. The 11-level MLI is more efficiently integrated into the grid than the 9-level MLI.

Grid Integration and Performance Analysis of hybrid Multilevel Inverters

The hike in the use of the high-power utilization, the want for the multilevel inverter (MLI) came into picture. The multilevel inverters are designed so as to obtain higher levels of voltage using very less numbers of resources. So, the design of a hybrid reduced switch topology for the inverter started. Further sources are modified in order to obtain a very large level of voltage with a smaller number of sources. Similar effort is made to designed hybrid inverter structures for 9-level and 11-level multi-level inverters (MLIs) with significantly reduced numbers of power electronics devices and direct current power supplies. Further the topology is controlled and connected to grid using Phase Locked Loop (PLL) to analyze the performance of the inverter with the single-phase grid. A current controller is build using Proportional-Resonant (PR) controller to achieve proper integration of the MLI with the grid. The reference waveform obtained from the controller is used to achieve the inverter gate pulse using Level Shift Pulse Width Modulation (LS-PWM) technology. The 11-level MLI is more efficiently integrated into the grid than the 9-level MLI. 

Recent developments have made multilevel inverters a crucial alternative in implementations requiring high power and high voltage. Various applications, including electric vehicles, renewable energy conversion systems, etc., utilize a variety of multilevel inverter topologies. Primary objective of recent innovative reduced switch-based multilevel inverter topologies is to use fewer components than classical topologies. This research examines various level shifted multi- carrier SPWM (Sinusoidal Pulse Width Modulation) methods for a three-phase, seven-level, reduced switch-based MLI (Multilevel Inverter) topology, including in-phase, phase opposition, and alternate-phase opposition disposition. These methods are suggested by several authors in order to guarantee effective voltage utilization and an improved harmonic spectrum. The THD (Total Harmonic Distortion) of outputvoltage and current has been given special attention. MATLAB/Simulink 2016 platform was used for simulation and analysis.

Comparison of Level Shifted SPWM Methods for Three Phase, Seven Level Reduced Switch Based Multilevel Inverter

In the recent years, the requirement of multilevel inverter is expeditiously increasing in the field of electrical energy utilization. Because the multilevel inverter is a key technology to integrate the renewable energy sources with the grid. Recently, various multilevel inverter topologies have been introduced which required a large number of power switches, gate drive circuit and voltage sources, as a result the complexity of the circuit, power losses and voltage stress on switch increases on the other hand the efficiency of the system reduces. It also produces power quality issues at the generating and distributing utility end. In this paper, a new topology of multilevel inverter with reduced number of power switches and dc voltage sources are presented. The proposed topology has been designed to 9-level inverter with eight unidirectional, one bidirectional and two dc voltage sources. The proposed topology comprises of a H-bridge which synthesize a ac voltage by utilizing almost all possible additive and subtractive cases of the voltage sources with its combinational power switches. The researchers generated optimal switching angles using selective harmonic elimination technique with Genetic Algorithm to reduce the lower order harmonic present in the output voltage of the proposed nine-level inverters. MATLAB/ SIMULINK tool has been used to validate the proposed topology results on various load. The harmonic analysis of nine-level multilevel inverter for R-Ioad and RL-load through analysis by simulation. The proposed topology offers a high-power quality output with THD less than 5% and individual harmonic less than 3% as per the recommendation of IEEE 519.

Harmonic Reduction in Reduced Power Switch Multilevel Inverter Using Genetic Optimization

Multilevel inverters (MLI) are commonly used for grid integration of renewable energy sources (RES) and for high-power industrial applications. MLI has excellent characteristics, such as high-level output voltage with minimal distortion of harmonics, meeting the requirements of power efficiency. General MLI topologies have a more complicated circuit, with more part numbers, high total cost and area of installation. This paper thus provides a synthesis of knowledge of the various topologies of the MLI and maps the knowledge gaps. The conceptual diagram with the switching sequence table and mathematical equations of the topology has been defined and also covers most of the newly formed MLI, and this paper has effectively outlined the useful information. The need for the hour, along with the required modulation method, is due to a huge number of power semiconductor switch and control circuit isolation, less electronic power switches and dc source. In this article, some of the configurations with less power switches and MLI configuration for induction motor drive are checked.

Savita Swaroop

Papers

Harmonic Reduction in Reduced Power Switch Multilevel Inverter Using Genetic Optimization

A Review on Recent Advancements in Multilevel Inverter Topologies with Reduced Number of Power Switch