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Seshadri Gopalan

Researcher at Indian Institute of Technology Madras

Publications -  7
Citations -  31

Seshadri Gopalan is an academic researcher from Indian Institute of Technology Madras. The author has contributed to research in topics: Capacitor & Choke. The author has an hindex of 2, co-authored 5 publications receiving 13 citations.

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Journal ArticleDOI

Impact of Supply Voltage Unbalance and Harmonics on DC Bus Electrolytic Capacitor of Adjustable Speed Drives

TL;DR: The article proposes the derating of load required to keep the capacitor current within the safe value irrespective of the level of abnormalities and grid impedance.
Proceedings ArticleDOI

Voltage Unbalance: Impact of Various Definitions on Severity Assessment for Adjustable Speed Drives

TL;DR: In this paper, the impact of voltage unbalance assessment in estimating their severity for Adjustable Speed Drives (ASDs) has been investigated, where the true unbalance in system voltages, as defined by the ratio of negative to positive sequence is taken as the benchmark to assess the deviation arising out of various definitions.
Proceedings ArticleDOI

Impact of Supply Voltage Harmonics on dc bus Capacitor and Inductor of Adjustable Speed Drives

TL;DR: In this article, the authors proposed the use of Crest Factor (CF) and Asymmetry Factor (AF) of the supply voltage to assess the impact of supply voltage harmonics on dc bus capacitor and choke inductor.
Proceedings ArticleDOI

Effect of Balanced and Unbalanced Voltage Fluctuation on DC bus Inductor and Capacitor of Adjustable Speed Drives

TL;DR: In this article, the effect of sinusoidal balanced fluctuation on dc bus capacitors with inductor placed either in dc-link or ac side was analyzed, and an analytical expression was derived to calculate the magnitude of low frequency component in the capacitor current for a given magnitude and frequency of fluctuation.
Proceedings ArticleDOI

Effect of Inductor Placement on DC Bus Capacitor of Adjustable Speed Drives

TL;DR: In this paper, the difference in the DC bus capacitor ripple current values between the two topologies for a given grid disturbance condition was identified, and it was found that the DC choke topology is better in terms of the stress on DC bus capacitance under balanced, unbalanced, and distorted grid conditions, considering the practical field data.