The growing interest in connecting more distributed generation (DG) units to the utility grid, microgrids deal with the various challenges to satisfy a sufficient level of ancillary services such as active power oscillations (APOs), reactive power oscillations (RPOs), fault ride-through (FRT) capability, and overcurrent problem. Hence, for parallel operated grid-connected inverters (GCIs) based MG, this study presents a multi-objective control scheme that simultaneously ensures elimination of the collective APOs/RPOs at point of common coupling (PCC), overcurrent protection and reactive power injection. One of the significant parts of this study compared with similar existing studies is that provides reactive power support capability to fulfil the FRT requirements of the grid-connected multi-DG units and to remain grid-connected during asymmetrical grid faults. A current restraining control is also presented to ensure the safe operation of the MG system and to avoid overcurrent. The cancellation of the collective APOs and RPOs at the PCC for parallel operation of the GCIs has been achieved by using adjustable control coefficients and demonstrated with theoretical analyses in detail. Extensive case studies are presented and discussed to demonstrate the performance of the proposed ideas and to meet the shortcomings of the previous studies.

https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/iet-rpg.2020.0057

Multi-objective control scheme for operation of parallel inverter-based microgrids during asymmetrical grid faults

Among the various supply voltage abnormalities, unbalance and distortion are some of the major threats to the dc bus capacitor of adjustable speed drives. The effect of supply voltage unbalance on the dc bus capacitor changes in the presence of supply voltage harmonics. Further, the value of grid impedance and the load on the drive influences the response of these supply voltage abnormalities on the dc bus capacitor. This article analyzes the impact of unbalance, distortion, and simultaneous presence of unbalance and distortion in the supply voltage, on the dc bus capacitor, along with the effect of grid impedance and the load on the drive. As a result of the analysis, the article proposes the derating of load required to keep the capacitor current within the safe value irrespective of the level of abnormalities and grid impedance. The effects are analyzed by simulations and validated by the hardware test setup.

Impact of Supply Voltage Unbalance and Harmonics on DC Bus Electrolytic Capacitor of Adjustable Speed Drives

This paper proposes a frequency coupling matrix to model a three phase Variable Frequency Drive (VFD) for balanced harmonic simulations. The model is obtained by performing a fingerprint scan on the time domain model built in simulation and validated with a commercial VFD in the lab. The characteristics of the matrix obtained are discussed in the paper. The response obtained from the matrix model is analyzed and compared with the one obtained from time domain model for different distortion levels of the applied voltage. The voltage waveforms are constructed with various combinations of harmonics having different magnitude and phase angle combinations, as observed from the field measurement in various locations in India. It is shown that the response obtained from the matrix model matches closely with that obtained from the time domain simulation of the VFD.

Modelling Three Phase Variable Frequency Drive Using a Frequency Coupling Matrix

This paper presents the analysis of real time power quality data collected for 50 days at a domestic site in India. The data is collected using a dedicated PQ analyzer. The measurement and analysis are performed to identify the level of different grid disturbances and compared with relevant standards. Voltage unbalance and individual voltage harmonics are observed to be the major disturbances. In addition, the analysis of different kinds of loads, including new technology loads, present at the house is performed by recording the current waveforms drawn by these loads. The incoming supply voltage and current of the neighbouring houses are also recorded. An aggregate load model is presented based on the measurements performed at different houses connected to the same feeder.

Power Quality Monitoring and Analysis of the Domestic Grids - A Case Study

Several existing three-phase delta voltages’ unbalance factors, including the "true unbalance factor" (the negative sequence voltage unbalance factor) and its complex form, are considered. New geometric criteria of delta voltages’ balance and unbalance, based on the dealing with delta voltages’ triangles of equal perimeters and different areas are offered. All the unbalance factors are shown in their dependences on one particular phase voltage (and also on one particular delta voltage), separately on the magnitude (for the case of a single-phase magnitude unbalance) and on the initial phase angle value (for the case of a single-phase angle unbalance). Also the fragment of a LabVIEW virtual instrument for the assessment of the negative sequence voltage unbalance factor and the new geometric factors is offered.

On the Assessment of Three-Phase Delta Voltages’ Unbalance

Electrolytic capacitors used in adjustable speed drives (ASDs) are affected more by low-frequency currents than high frequency. It is shown in this article that even-ordered harmonics in the supply voltage create a 150 Hz current component in the dc bus, and impact the heating in the capacitor. It is further shown that the total harmonic distortion of the current drawn by the ASD is adversely affected due to the even-ordered harmonics. This article discusses a cost-effective approach based on suitable triggering of the silicon controlled rectifiers (SCRs) in the bridge of ASD to suppress the effect of even-ordered harmonics on capacitor ripple current and source current. Using parameters taken from capacitor datasheets, and the supply voltage characteristics from field studies, exhaustive simulation studies are presented to identify an approach to the determination of various thresholds required. The applicability of the method to the ASDs of various power levels is also presented. The proposed strategy is analyzed by simulations under different grid impedance and harmonic combination cases and validated by a hardware test setup.

An Approach to Control SCR Bridge Rectifier to Suppress the Effect of Even Ordered Supply Voltage Harmonics on DC-Bus Capacitor of Adjustable Speed Drives

Abstract Diode bridge front-end Adjustable Speed Drives (ASDs) generally have an inductor either in the DC side (DC choke) or in the AC side (AC choke). Since both the types of ASDs are commercially widely used, a comparison of their behavior under normal and abnormal grid conditions is of interest. It is identified in this work that there exists a difference in the ripple current through the DC bus capacitor between the two variants. Further, the difference in the ripple current varies depending on the type of the disturbance and its level. As an outcome of the study, it is identified that the stress levels arising in the DC choke variant on the DC bus capacitor are lesser compared to the corresponding AC choke variant under balanced, unbalanced, and distorted grid voltage conditions, for the same value of the equivalent inductance in the AC and DC side. In order to match the stress levels arising in the DC bus capacitor between the ASDs with DC and AC choke, it is found that a 50% higher value of inductance is required in an AC choke variant. The effects are analyzed by simulations and validated using an experimental setup.

Seshadri Gopalan

Papers

An Approach to Control SCR Bridge Rectifier to Suppress the Effect of Even Ordered Supply Voltage Harmonics on DC-Bus Capacitor of Adjustable Speed Drives

Impact of Inductor Placement on DC Bus Capacitor of Adjustable Speed Drives under Non-Ideal Supply Voltage Conditions