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Shaizeen Aga
Researcher at Advanced Micro Devices
Publications - 20
Citations - 363
Shaizeen Aga is an academic researcher from Advanced Micro Devices. The author has contributed to research in topics: Computer science & Memory management. The author has an hindex of 6, co-authored 16 publications receiving 261 citations. Previous affiliations of Shaizeen Aga include University of Michigan & Qualcomm.
Papers
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Proceedings Article
Compute Caches
Shaizeen Aga,Supreet Jeloka,Arun Subramaniyan,Satish Narayanasamy,David Blaauw,Reetuparna Das +5 more
TL;DR: This paper presents the Compute Cache architecture that enables in-place computation in caches, which uses emerging bit-line SRAM circuit technology to repurpose existing cache elements and transforms them into active very large vector computational units.
Proceedings ArticleDOI
InvisiMem: Smart Memory Defenses for Memory Bus Side Channel
Shaizeen Aga,Satish Narayanasamy +1 more
TL;DR: It is demonstrated that smart memory, memory with compute capability and a packetized interface, can dramatically simplify this problem and have one to two orders of magnitude of lower overheads for performance, space, energy, and memory bandwidth, compared to prior solutions.
Proceedings ArticleDOI
Efficiently enforcing strong memory ordering in GPUs
TL;DR: This paper shows that the performance cost of SC and TSO compared to DRF-0 is insignificant for most GPGPU applications, due to warp-level parallelism and in-order execution, and proposes a GPU-specific non-speculative SC design that takes advantage of high spatial locality and temporally private data in GPU applications.
Proceedings ArticleDOI
MOCA: Memory Object Classification and Allocation in Heterogeneous Memory Systems
TL;DR: A memory object classification and allocation framework (MOCA) to characterize memory objects and then allocate them to their best-fit memory module to improve performance and energy efficiency is designed.
Proceedings ArticleDOI
Co-ML: a case for Collaborative ML acceleration using near-data processing
TL;DR: A case is made for a more collaborative approach to ML acceleration, termed Co-ML, in which memory plays an active role and is responsible for NDP-amenable computations while the compute-intensive computations are executed on the host accelerator as before.