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Showing papers by "Shoji Otaka published in 2000"


Journal ArticleDOI
07 Feb 2000
TL;DR: In this article, a linear-in-dB variable-gain amplifier (VGA) using a pre-distortion circuit to generate the gain-control signal is fabricated in a BiCMOS process with f/sub T/=20 GHz.
Abstract: A linear-in-dB variable-gain amplifier (VGA) using a pre-distortion circuit to generate the gain-control signal is fabricated in a BiCMOS process with f/sub T/=20 GHz. The VGA comprises two cascaded stages of signal-summing VGA and has a variable-gain range of over 70 dB. It can operate at up to 500 MHz and dissipates 36 mW from a 3-V supply. A noise figure of below 5 dB and IIP3 of over -38 dBm at 43-dB gain were obtained. The VGA achieved a gain error of less than 2 dB over 70-dB gain range, and it occupies approximately 1 mm/sup 2/. The VGA is applicable to future code division multiple access (CDMA) receivers.

85 citations


Patent
Shoji Otaka1, Osamu Watanabe1
27 Oct 2000
TL;DR: A variable gain circuit includes a variable gain amplifier which receives an input signal, outputs an amplified signal, and includes a first field effect transistor, a gain control signal compensation circuit, and a gain deviation correction circuit as mentioned in this paper.
Abstract: A variable gain circuit includes a variable gain amplifier which receives an input signal, outputs an amplified signal, and includes a first field-effect transistor, a gain control signal compensation circuit which outputs a gain control signal for controlling the gain of the variable gain amplifier and includes a second field-effect transistor, and a gain deviation correction circuit which corrects a gain deviation based on the variable gain amplifier and the gain control signal compensation circuit.

43 citations



Journal ArticleDOI
TL;DR: In this article, a direct conversion transmitter IC including a frequency doubler, a quadrature modulator, and a 3-bit variable attenuator was fabricated using BiCMOS technology with f_T of 12 GHz.
Abstract: A direct conversion transmitter IC including a proposed frequency doubler, a quadrature modulator, and a 3-bit variable attenuator was fabricated using BiCMOS technology with f_T of 12 GHz. This architecture employing frequency doubler is intended for realizing wireless terminals that are low in cost and small in size. The architecture is effective for reducing serious interference between PA and VCO by making the VCO frequency different from that of PA. The proposed frequency doubler comprises a current-driven 90° phase-shifter and an ECL-EXOR circuit for both low power operation and wide input power range of local oscillator (LO). The proposed frequency doubler keeps high output power even when rectangular wave from LO is applied owing to use of the current-driven 90° phase-shifter instead of a voltage-driven 90° phase-shifter. An LO leakage of less than −25 dBc, an image rejection ratio in excess of 45 dBc, and a maximum attenuation of 21 dB were measured. The transmitter IC successfully operates at LO power above −15 dBm and consumes 68 mA from 2.7 V power supply voltage. An active die size is 1.5 mm×3 mm.

6 citations


Patent
06 Nov 2000
TL;DR: In this article, a temperature compensation circuit that corrects a 1st signal current supplied externally in order to control the gain of the variable gain amplifier for the temperature compensation of the gain characteristic of the MOS TR was proposed.
Abstract: PROBLEM TO BE SOLVED: To reduce a temperature change in the gain characteristic of a variable gain amplifier employing a MOS transistor (TR). SOLUTION: This invention provides the temperature compensation circuit that corrects a 1st signal current supplied externally in order to control the gain of the variable gain amplifier for the temperature compensation of the gain characteristic of the variable gain amplifier employing the MOS TR, is characterized in the provision of a current source (101) that provides an output of a 2nd signal current depending on a temperature change between the ambient temperature and a prescribed temperature and with a multiplier (104) that receives the 1st and 2nd signal currents and provides an output of a 3rd output current in proportion to the temperature change and the 1st signal current, and the temperature compensation circuit supplies the 3rd signal current to the variable gain amplifier in place of the 1st signal current. COPYRIGHT: (C)2002,JPO

4 citations