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Shubhabrata Sengupta
Researcher at University of California, Davis
Publications - 25
Citations - 2146
Shubhabrata Sengupta is an academic researcher from University of California, Davis. The author has contributed to research in topics: Data structure & Graphics hardware. The author has an hindex of 15, co-authored 25 publications receiving 2087 citations. Previous affiliations of Shubhabrata Sengupta include Baidu & Nvidia.
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Proceedings ArticleDOI
Scan primitives for GPU computing
TL;DR: Using the scan primitives, this work shows novel GPU implementations of quicksort and sparse matrix-vector multiply, and analyzes the performance of the scanPrimitives, several sort algorithms that use the scan Primitives, and a graphical shallow-water fluid simulation using the scan framework for a tridiagonal matrix solver.
Journal ArticleDOI
Fast BVH Construction on GPUs
TL;DR: Preliminary results show that current GPU architectures can compete with CPU implementations of hierarchy construction running on multicore systems and can construct hierarchies of models with up to several million triangles and use them for fast ray tracing or other applications.
Journal ArticleDOI
Real-time parallel hashing on the GPU
Dan A. Alcantara,Andrei Sharf,Fatemeh Abbasinejad,Shubhabrata Sengupta,Michael Mitzenmacher,John D. Owens,Nina Amenta +6 more
TL;DR: An efficient data-parallel algorithm for building large hash tables of millions of elements in real-time, which considers a classical sparse perfect hashing approach, and cuckoo hashing, which packs elements densely by allowing an element to be stored in one of multiple possible locations.
Journal ArticleDOI
Glift: Generic, efficient, random-access GPU data structures
TL;DR: Glift, an abstraction and generic template library for defining complex, random-access graphics processor (GPU) data structures, is presented and several new GPU data structures are characterized and implemented using reusable Glift components.
Efficient Parallel Scan Algorithms for GPUs
TL;DR: This paper describes the design of ecient scan and segmented scan parallel primitives in CUDA for execution on GPUs using a divide-and-conquer approach and demonstrates that this design methodology results in routines that are simple, highly ecient, and free of irregular access patterns that lead to memory bank conicts.