This invention clarifies the effects of parameters and enables the mass production of a super-junction semiconductor device, which has a drift layer composed of a parallel pn layer that conducts electricity in the ON state and is depleted in the OFF state. The quantity of impurities in n drift regions is within the range between 100% and 150% or between 110% and 150% of the quantity of impurities in p partition regions. The impurity density of either one of the n drift regions and the p partition regions is within the range between 92% and 108% of the impurity density of the other regions. In addition, the width of either one of the n drift regions and the p partition regions is within the range between 94% and 106% of the width of the other regions.

Semiconductor device with alternating conductivity type layer and method of manufacturing the same

The present invention discloses a GOA circuit structure. The GOA circuit structure comprises multiple twined GOA units cascaded with each other, each said twined GOA unit comprises the (2N−1)-level GOA unit and the 2N-level GOA unit, which has a first pull-down holding circuit ( 500 ), a second pull-down holding circuit ( 600 ), a third pull-down holding circuit ( 500 ′), and a fourth pull-down holding circuit ( 600 ′) connected with the (2N−1)-level gate signal point (Q(2N−1)) and the 2N-level gate signal point (Q(2N)). By inputting the first clock signal, the second clock signal, the third clock signal, and the fourth clock signal to make the first pull-down holding circuit ( 500 ), the second pull-down holding circuit ( 600 ), the third pull-down holding circuit ( 500 ′), and the fourth pull-down holding circuit ( 600 ′) work alternately. The GOA circuit structure according to the present invention makes each portion work for ¼ time and take rest for ¾ time by sharing the pull-down holding circuit, which can reduce the TFT stress of the pull-down holding circuit.

Goa circuit structure

In the semiconductor integrated circuit device, a first P + type buried layer formed as an anode region and an N + type diffused region formed in a cathode region are spaced from each other in the direction of the depth. This makes it possible to provide a semiconductor integrated circuit device in which a large depletion layer forming region can be provided in an N type region at a PN junction formed by first and second epitaxial layers and when a reverse bias voltage is applied to a diode element and in which a withstand voltage can be maintained by a depletion layer thus formed to prevent breakdown of elements in the device attributable to a breakdown current.

Semiconductor integrated circuit device and manufacturing method thereof

A solid state power controller for switching power on and off to an electrical load which also serves as a circuit protection device protecting the load and/or the wire connected between the load output terminal of the controller and ground from thermal damage due to current overload is shown. When a current overload exists the controller interrupts current to the load in a time inversely proportional to the square of the magnitude of the overload as shown in a trip time vs load current curve. The controller also limits the load current to a selected maximum level by controlling the drain-source resistance of power MOSFETs used for switching the power. A secondary interrupt is provided in the event that the junction temperature of the MOSFETs has risen a selected maximum level. A thermal memory feature is included for both interrupt signals. The controller is controlled by a single on/off input line and provides both a status and trip output line to indicate its state. The status can be configured to monitor load voltage or load current flow as desired. The controller also can be configured to default to either an on or off state in the event the input line is disconnected.

Solid state power controller with power switch protection apparatus

Current sensing circuits having independently adjustable dual-level trip thresholds for use in hot swap controllers, solid state circuit breakers and other current sensing circuits. The dual-level trip threshold is user-programmable to provide one current level for power-up conditions and another current level for normal operation. The two separate thresholds are also useful during normal operation to monitor both the steady state current and to set a limit on the upper current which should never be exceeded. Various features and alternate embodiments are disclosed.

Current monitors with independently adjustable dual level current thresholds

A driving circuit is provided for a power transistor connected to an inductive load. A detection resistor is placed between ground and the emitter of the power transistor. The driving circuit has a first portion which is capable of generating a first current which is a non-linear function of the voltage across the detection resistance. A second portion of the driving circuit is used to generate a base current for the power transistor that is proportional to the first current. The non-linear function of the first current compensates for the non-linear gain with respect to collector current of the power transistor.

Power transistor driving circuit

A solid-state integrated driver circuit designed to drive a high-energy coil in a microprocessor-based EMS (engine management system) under the direct guidance of a microcontroller is described. The authors review the principal characteristics of the VIPower (vertical intelligent power) technology and then introduce the VB027, a novel fully protected switch for electronic ignition which directly interfaces with a microprocessor controller. The main characteristics of the VB027 are summarized as follows: the coil current is internally limited; a built-in collector-emitter voltage clamping is present; the input is TTL (transistor transistor logic)/CMOS compatible; and an output diagnostic to the microprocessor for dwell angle control and overtemperature protection is available. >

Modern electronic ignition in VIPower technology

A circuit is provided for protecting against an increase in collector current for an integrated circuit containing a power switching device. The power device drives an inductive load connected to a power supply, and is connected to a control circuit for switching the power device on and off. The protection circuit contains a clamping circuit for deactivating the control circuit and switching the power device off when the current flowing through the power device reaches a preset maximum value. In addition, a circuit is provided for inhibiting the operation of the clamping circuit for a preset time interval after the power device has been switched on, and for keeping the clamping circuit in operation during voltage undershoots caused by the inductive load following the switching of the powered device off.

Protective circuit for semiconductor power device

A circuit for use with an ignition system to enable detection of an overvoltage condition in the primary winding of an ignition coil caused by opening of a power switch connected to the primary winding. The circuit senses the overvoltage condition by comparing the voltage on the primary winding to a first threshold voltage and produces a signal at an output terminal indicative of the presence of the overvoltage condition. The output terminal is maintained at a high logic level upon detection of an overvoltage condition and throughout the time duration of the overvoltage condition, and drops to a low logic level when the voltage on the primary winding falls to a second threshold voltage, which is lower than the first threshold voltage. Comparison circuitry is provided for sensing the overvoltage condition by reference to fixed voltage values. Logic circuitry responds to the comparison circuitry to produce the appropriate logic levels at the output terminal.

Circuit for detecting an overvoltage on a switched inductive load

An integrated device in an emitter-switching configuration comprises a first bipolar transistor having a base region, an emitter region, and a collector region, a second transistor having a charge-collection terminal connected to an emitter terminal of the first transistor, and a quenching element having a terminal connected to a base terminal of the first transistor. The quenching element is formed within the base region or the emitter region of the first transistor.

Stefano Sueri

Papers

Power transistor driving circuit

Modern electronic ignition in VIPower technology

Protective circuit for semiconductor power device

Circuit for detecting an overvoltage on a switched inductive load

Integrated device in an emitter-switching configuration