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Stephan Mechnig

Researcher at Infineon Technologies

Publications -  10
Citations -  745

Stephan Mechnig is an academic researcher from Infineon Technologies. The author has contributed to research in topics: Effective number of bits & Phase-locked loop. The author has an hindex of 8, co-authored 10 publications receiving 732 citations. Previous affiliations of Stephan Mechnig include National Semiconductor.

Papers
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Journal ArticleDOI

A 20-mW 640-MHz CMOS Continuous-Time $\Sigma\Delta$ ADC With 20-MHz Signal Bandwidth, 80-dB Dynamic Range and 12-bit ENOB

Gerhard Mitteregger, +5 more
- 20 Nov 2006 - 
TL;DR: A wide bandwidth continuous-time sigma-delta ADC, operating between 20 and 40 MS/s output data rate, is implemented in 130-nm CMOS and the degradation of modulator stability due to excess loop delay is avoided with a new architecture.
Proceedings Article

A 20-mW 640-MHz CMOS continuous-time ΣΔ ADC with 20-MHz signal bandwidth, 80-dB dynamic range and 12-bit ENOB

Gerhard Mitteregger, +5 more
TL;DR: A wide bandwidth continuous-time sigma-delta ADC, operating between 20 and 40 MS/s output data rate, is targeted for applications that demand high bandwidth, high resolution, and low power, such as wireless and wireline communications, medical imaging, video, and instrumentation.

with 20MHz Signal Bandwidth and 12b ENOB

Gerhard Mitteregger, +7 more
Proceedings ArticleDOI

A 14b 20mW 640MHz CMOS CT /spl Delta//spl Sigma/ ADC with 20MHz Signal Bandwidth and 12b ENOB

Gerhard Mitteregger, +7 more
TL;DR: A 3rd-order single-loop CT DeltaSigma modulator with a 4b internal quantizer operating at 640MHz achieves 76dB SNR, -78dB THD, and 74dB SINAD in a 20MHz signal bandwidth with an OSR of 16.5% with quantizer feedback architecture.
Proceedings Article

A 14b 20mW 640MHz CMOS CT ΔΣ ADC with 20MHz Signal Bandwidth and 12b ENOB.

Gerhard Mitteregger, +7 more