S
Stephen Charles West
Researcher at IBM
Publications - 16
Citations - 303
Stephen Charles West is an academic researcher from IBM. The author has contributed to research in topics: Error detection and correction & Signal. The author has an hindex of 7, co-authored 16 publications receiving 303 citations.
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Patent
Dynamic reconfiguration of data storage devices to balance recycle throughput
TL;DR: In this article, a data processing system is controlled by software to perform a method for recycling the data storage volumes containing a percentage of still valid data and a proportion of invalid data by transferring the still valid datasets on a plurality of input datasets to one or more output datasets.
Patent
Enhanced data formats and machine operations for enabling error correction
TL;DR: In this paper, the error pointing signals can be cyclic redundancy check (CRC) signals and error pointing redundancy signals are recorded between all of the resynchronization signals for pointing to signals in error for enhancing the error correction.
Patent
Error detection and correction having one data format recordable on record media using a diverse number of concurrently recorded tracks
Charles E. Bailey,Ernest S. Gale,Carl A. Hassell,Scott Jeffrey Schaffer,Sushama M. Paranjape,Stephen Charles West +5 more
TL;DR: In this paper, the data are arranged logically as a three-dimensional array consisting of a plurality of logically rectangular blocks of data, each block of data has columns and rows of data.
Patent
Management of fixed pages in memory for input/output operations
Robert Nelson Crockett,Ronald Maynard Kern,Gregory E. McBride,David Michael Shackelford,Stephen Charles West +4 more
TL;DR: In this article, the authors present a system for managing pages in a volatile memory device for data transfer operations between a first storage area and a second storage area. But the system is limited to a single data set and the number of pages needed to process the data transfer operation is limited.
Patent
Error correction method and system which selectively uses different levels of error correction to achieve high data throughput
TL;DR: In this article, an error detecting and correcting system capable of handling multiple errors with high throughput is proposed. But, the system is based on a reconfigurable decoder which is initially set for a low level of correction and a high throughput.