Showing papers by "Sung Hyun Jo published in 2009"

High-density crossbar arrays based on a Si memristive system.

Abstract: We demonstrate large-scale (1 kb) high-density crossbar arrays using a Si-based memristive system. A two-terminal hysteretic resistive switch (memristive device) is formed at each crosspoint of the array and can be addressed with high yield and ON/OFF ratio. The crossbar array can be implemented as either a resistive random-access-memory (RRAM) or a write-once type memory depending on the device configuration. The demonstration of large-scale crossbar arrays with excellent reproducibility and reliability also facilitates further studies on hybrid nano/CMOS systems.

Programmable resistance switching in nanoscale two-terminal devices.

Abstract: We show that in nanoscale two-terminal resistive switches the resistance switching can be dominated by the formation of a single conductive filament. The probabilistic filament formation process strongly affects the device operation principle, and can be programmed to facilitate new functionalities such as multibit switching with partially formed filaments. In addition, the nanoscale switches exhibit excellent performance metrics making them well suited for memory or logic operations using conventional or emerging hybrid nano/CMOS architectures.

Silicon-based nanoscale resistive device with adjustable resistance

Abstract: A non-volatile solid state resistive device that includes a first electrode, a p-type poly-silicon second electrode, and a non-crystalline silicon nanostructure electrically connected between the electrodes. The nanostructure has a resistance that is adjustable in response to a voltage being applied to the nanostructure via the electrodes. The nanostructure can be formed as a nanopillar embedded in an insulating layer located between the electrodes. The first electrode can be a silver or other electrically conductive metal electrode. A third (metal) electrode can be connected to the p-type poly- silicon second electrode at a location adjacent the nanostructure to permit connection of the two metal electrodes to other circuitry. The resistive device can be used as a unit memory cell of a digital non- volatile memory device to store one or more bits of digital data by varying its resistance between two or more values.

Silicon based nanoscale crossbar memory

Abstract: The present application describes a crossbar memory array. The memory array includes a first array of parallel nanowires of a first material and a second array of parallel nanowires of a second material. The first and the second array are oriented at an angle with each other. The array further includes a plurality of nanostructures of non-crystalline silicon disposed between a nanowire of the first material and a nanowire of the second material at each intersection of the two arrays. The nanostructures form a resistive memory cell together with the nanowires of the first and second materials.

Experimental, modeling and simulation studies of nanoscale resistance switching devices

Abstract: Excellent resistance switching properties such as fast switching time ( 106), good retention (> 6 years) and endurance (> 105) are observed in nanoscale amorphous silicon based RRAM (resistive random access memory). To successfully integrate the RRAM array, circuit models of the device characteristics and effects of device configuration such as crosstalk between cells within the array need to be elucidated. To this end, we performed experiments on the junction configuration and device modeling to predict the device behavior and 3D electric field simulation to predict the effect of the switching medium thickness in terms of crosstalk during the writing process.

Mémoire crossbar nanoscopique à base de silicium

Abstract: La presente application concerne une matrice de memoire crossbar. La matrice de memoire comprend une premiere matrice de nanofils paralleles d'un premier materiau et une seconde matrice de nanofils paralleles d'un second materiau. Les premiere et seconde matrices sont orientees avec un angle entre elles. La matrice comprend en outre une pluralite de nanostructures de silicium non cristallin dispose entre un nanofil du premier materiau et un nanofil du second materiau a chaque intersection des deux matrices. Les nanostructures forment une cellule memoire resistive avec les nanofils des premier et second materiaux.