Buildings are among the largest consumers of electricity in the US. A significant portion of this energy use in buildings can be attributed to HVAC systems used to maintain comfort for occupants. In most cases these building HVAC systems run on fixed schedules and do not employ any fine grained control based on detailed occupancy information. In this paper we present the design and implementation of a presence sensor platform that can be used for accurate occupancy detection at the level of individual offices. Our presence sensor is low-cost, wireless, and incrementally deployable within existing buildings. Using a pilot deployment of our system across ten offices over a two week period we identify significant opportunities for energy savings due to periods of vacancy. Our energy measurements show that our presence node has an estimated battery lifetime of over five years, while detecting occupancy accurately. Furthermore, using a building simulation framework and the occupancy information from our testbed, we show potential energy savings from 10% to 15% using our system.

[ACM Press the 2nd ACM Workshop - Zurich, Switzerland (2010.11.02-2010.11.02)] Proceedings of the 2nd ACM Workshop on Embedded Sensing Systems for Energy-Efficiency in Building - BuildSys \'10 - Occupancy-driven energy management for smart building automation

Fully decentralized peer-to-peer energy sharing framework for smart buildings with local battery system and aggregated electric vehicles

The study of parallel task models executed with predictable scheduling approaches is a fundamental problem for real-time multiprocessor systems. Nevertheless, to date, limited efforts have been spent in analyzing the combination of partitioned scheduling and non-preemptive execution, which is arguably one of the most predictable schemes that can be envisaged to handle parallel tasks. This paper fills this gap by proposing an analysis for sporadic DAG tasks under partitioned fixed-priority scheduling where the computations corresponding to the nodes of the DAG are non-preemptively executed. The analysis has been achieved by means of segmented self-suspending tasks with nonpreemptable segments, for which a new fine-grained analysis is also proposed. The latter is shown to analytically dominate state-of-the-art approaches. A partitioning algorithm for DAG tasks is finally proposed. By means of experimental results, the proposed analysis has been compared against a previouslyproposed analysis for DAG tasks with non-preemptable nodes managed by global fixed-priority scheduling. The comparison revealed important improvements in terms of schedulability performance.

/pdf/partitioned-fixed-priority-scheduling-of-parallel-tasks-2apkt15lfb.pdf

Partitioned Fixed-Priority Scheduling of Parallel Tasks Without Preemptions

A novel hybrid modelling structure fabricated by using Takagi-Sugeno fuzzy to forecast HVAC systems energy demand in real-time for Basra city

Technical and economic analysis of a solar air heating system integration in a residential building wall to increase energy efficiency by solar heat gain and thermal insulation

Retrofitting low-cost heating ventilation and air-conditioning systems for energy management in buildings

Schedulability analysis for tasks running on micro- processors with cache memory is incomplete without a treatment of Cache Related Preemption Delays (CRPD) and Cache Persistence Reload Overheads (CPRO). State-of-the-art analyses compute CRPD and CPRO independently, which might result in counting the same overhead more than once. In this paper, we analyze the pessimism associated with the independent calculation of CRPD and CPRO in comparison to an integrated approach. We answer two main questions: (1) Is it benecial to integrate the calculation of CRPD and CPRO? (2) When and to what extent can we gain in terms of schedulability by integrating the calculation of CRPD and CPRO? To achieve this, we (i) identify situations where considering CRPD and CPRO separately might result in overestimating the total memory overhead suffered by tasks, (ii) derive new analyses that integrate the calculation of CRPD and CPRO; and (iii) perform a thorough experimental evaluation using benchmarks to compare the performance of the integrated analysis against the separate calculation of CRPD and CPRO.

/pdf/integrated-analysis-of-cache-related-preemption-delays-and-2yb1hv7mwh.pdf

Integrated Analysis of Cache Related Preemption Delays and Cache Persistence Reload Overheads

Memory bus contention strongly relates to the number of main memory requests generated by tasks running on different cores of a multicore platform, which, in turn, depends on the content of the cache memories during the execution of those tasks Recent works have shown that due to cache persistence the memory access demand of multiple jobs of a task may not always be equal to its worst-case memory access demand in isolation Analysis of the variable memory access demand of tasks due to cache persistence leads to significantly tighter worst-case response time (WCRT) of tasks In this work, we show how the notion of cache persistence can be extended from single-core to multicore systems In particular, we focus on analyzing the impact of cache persistence on the memory bus contention suffered by tasks executing on a multi-core platform considering both work conserving and non-work conserving bus arbitration policies Experimental evaluation shows that cache persistence-aware analyses of bus arbitration policies increase the number of task sets deemed schedulable by up to 70 percentage points in comparison to their respective counterparts that do not account for cache persistence

/pdf/cache-persistence-aware-memory-bus-contention-analysis-for-3os2ljeekv.pdf

Cache persistence-aware memory bus contention analysis for multicore systems

A task can be preempted by several jobs of higherpriority tasks during its response time. Assuming the worst-casememory demand for each of these jobs leads to pessimistic worst-case response time (WCRT) estimations. Indeed, there is a bigchance that a large portion of the instructions and data associatedwith the preempting task Tj are still available in the cache when Tj releases its next jobs. Accounting for this observation allowsthe pessimism of WCRT analysis to be significantly reduced, which is not considered by existing work. The four main contributions of this paper are: 1) The conceptof persistent cache blocks is introduced in the context of WCRTanalysis, which allows re-use of cache blocks to be captured,2) A cache-persistence-aware WCRT analysis for fixed-prioritypreemptive systems exploiting the PCBs to reduce the WCRTbound, 3) A multi-set extension of the analysis that furtherimproves the WCRT bound and 4) An evaluation showing thatour cache-persistence-aware WCRT analysis results in up to 10%higher schedulability than state-of-the-art approaches.

/pdf/cache-persistence-aware-response-time-analysis-for-fixed-3zgduabo79.pdf

Cache-Persistence-Aware Response-Time Analysis for Fixed-Priority Preemptive Systems

Caches help reduce the average execution time of tasks due to their fast operational speeds. However, caches may also severely degrade the timing predictability of the system due to intra- and inter-task cache interference. Intra-task cache interference occurs if the memory footprint of a task is larger than the allocated cache space or when two memory entries of that task are mapped to the same space in cache. Inter-task cache interference occurs when memory entries of two or more distinct tasks use the same cache space. State-of-the-art analysis focusing on bounding cache interference or reducing it by means of partitioning and by optimizing task layout in memory either focus on intra- or inter-task cache interference and do not exploit the fact that both intra- and inter-task cache interference can be interrelated.In this work, we show how one can model intra- and inter-task cache interference in a way that allows balancing their respective contribution to tasks worst-case response times. Since the placement of tasks in memory and their respective cache footprint determine the intra- and inter-task interference that tasks may suffer, we propose a technique based on cache coloring to improve task set schedulability. Experimental evaluations performed using Malardalen benchmarks show that our approach results in up to 13% higher task set schedulability than state-of-the-art approaches.

https://www.cister.isep.ipp.pt/docs/trading_between_intra__and_inter_task_cache_interference_to_improve_schedulability/1396/view.pdf

Syed Aftab Rashid

Papers

Retrofitting low-cost heating ventilation and air-conditioning systems for energy management in buildings

Integrated Analysis of Cache Related Preemption Delays and Cache Persistence Reload Overheads

Cache persistence-aware memory bus contention analysis for multicore systems

Cache-Persistence-Aware Response-Time Analysis for Fixed-Priority Preemptive Systems

Trading Between Intra- and Inter-Task Cache Interference to Improve Schedulability