We present a combined electrical and modeling study to determine the tunneling electron effective mass and electron affinity for HfO 2 . Experimental capacitance–voltage ( C – V ) and current–voltage ( J – V ) characteristics are presented for HfO 2 films deposited on Si(1 0 0) substrates by atomic layer deposition (ALD) and by electron beam evaporation (e-beam), with equivalent oxide thicknesses in the range 10–12.5 A. We extend on previous studies by applying a self-consistent 1D-Schrodinger–Poisson solver to the entire gate stack, including the inter-layer SiO x region – and to the adjacent substrate for non-local barrier tunnelling – self-consistently linked to the quantum-drift-diffusion transport model. Reverse modeling is applied to the correlated gate and drain currents in long-channel MOSFET structures. Values of (0.11 ± 0.03) m 0 and (2.0 ± 0.25) eV are determined for the HfO 2 electron effective mass and the HfO 2 electron affinity, respectively. We apply our extracted electron effective mass and electron affinity to predict leakage current densities in future 32 nm and 22 nm technology node MOSFETs with SiO x thicknesses of 7–8 A and HfO 2 thicknesses of 23–24 A.

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Determination of electron effective mass and electron affinity in HfO2 using MOS and MOSFET structures

Graphene transistors are of considerable interest for radio frequency (rf) applications. In general, transistors with large transconductance and drain current saturation are desirable for rf performance, which is however nontrivial to achieve in graphene transistors. Here we report high-performance top-gated graphene transistors based on chemical vapor deposition (CVD) grown graphene with large transconductance and drain current saturation. The graphene transistors were fabricated with evaporated high dielectric constant material (HfO(2)) as the top-gate dielectrics. Length scaling studies of the transistors with channel length from 5.6 μm to 100 nm show that complete current saturation can be achieved in 5.6 μm devices and the saturation characteristics degrade as the channel length shrinks down to the 100-300 nm regime. The drain current saturation was primarily attributed to drain bias induced shift of the Dirac points. With the selective deposition of HfO(2) gate dielectrics, we have further demonstrated a simple scheme to realize a 300 nm channel length graphene transistors with self-aligned source-drain electrodes to achieve the highest transconductance of 250 μS/μm reported in CVD graphene to date.

Top-gated chemical vapor deposition grown graphene transistors with current saturation.

New, stable aqueous solutions have been developed for the deposition of high-quality HfO2 thin films. The low ionic strength of the solution relative to a stoichiometric salt provides the means to directly spin coat a film without organic additives. Peroxide mediates particle interaction in the solution, while enabling relatively low-energy pathways for condensation of the precursor species to a film. Film structure, chemistry, and density are investigated by X-ray diffraction, FT-IR, electron-probe microanalysis, SEM, and X-ray reflectivity. Results from these measurements collectively reveal that smooth and dense HfO2 films are readily produced from the precursors with annealing at moderate temperatures. Optical properties of the films are studied by spectroscopic ellipsometry and transmission/reflection measurements. The observed refractive indices (1.89−1.93) are comparable to those achieved via vapor deposition techniques. Dielectric properties are evaluated through integration of the films into capa...

Low-Energy Path to Dense HfO2 Thin Films with Aqueous Precursor

Developing alternative high dielectric constant (k) materials for use as gate dielectrics is essential for continued advances in conventional inorganic CMOS and organic thin film transistors (OTFTs). Thicker films of high-k materials suppress tunneling leakage currents while providing effective capacitances comparable to those of thin films of lower-k materials. Self-assembled monolayers (SAMs) and multilayers offer attractive options for alternative OTFT gate dielectrics. One class of materials, organosilane-based self-assembled nanodielectrics (SANDs), has been shown to form robust films with excellent insulating and surface passivation properties, enhancing both organic and inorganic TFT performance and lowering device operating voltages. Since gate leakage current through the dielectric is one factor limiting continued TFT performance improvements, we investigate here the current (voltage, temperature) (I (V,T)) transport characteristics of SAND types II (π-conjugated layer) and III (σ-saturated + π-c...

Charge conduction and breakdown mechanisms in self-assembled nanodielectrics.

The continuous size downscaling of complementary metal–oxide–semiconductor (CMOS) transistors has led to the replacement of SiO2 with a HfO2-based high dielectric constant (or high-k) oxide, and the polysilicon electrode with a metal gate. The approach to this technological evolution has spurred a plethora of fundamental research to address several pressing issues. This review focusses on the large body of first principles (or ab initio) computational work employing conventional density functional theory (DFT) and beyond-DFT calculations pertaining to HfO2-based dielectric stacks. Specifically, structural, thermodynamic, electronic, and point-defect properties of bulk HfO2, Si/HfO2 interfaces, and metal/HfO2 interfaces are covered in detail. Interfaces between HfO2 and substrates with high mobility such as Ge and GaAs are also briefly reviewed. In sum, first principles studies have provided important insights and guidances to the CMOS research community and are expected to play an even more important role in the future with the further optimization and “scaling down” of transistors.

Recent progress in ab initio simulations of hafnia-based gate stacks

High dielectric constant hafnium oxide films were formed by electron beam (e-beam) evaporation on HF last terminated silicon (100) wafers. We report on the influence of low energy argon plasma ( ∼ 70 eV) and oxygen flow rate on the electrical, chemical, and structural properties of metal-insulator-silicon structures incorporating these e-beam deposited HfO2 films. The use of the film-densifying low energy argon plasma during the deposition results in an increase in the equivalent oxide thickness (EOT) values. We employ high resolution transmission electron microscopy (HRTEM), x-ray photoelectron spectroscopy (XPS), and medium energy ion scattering experiments to investigate and understand the mechanisms leading to the EOT increase. We demonstrate very good agreement between the interfacial silicon oxide thicknesses derived independently from XPS and HRTEM measurements. We find that the e-beam evaporation technique enabled us to control the SiOx interfacial layer thickness down to ∼ 6 A. Very low leakage current density (<10−4 A/cm2) is measured at flatband voltage +1 V into accumulation for an estimated EOT of 10.9±0.1 A. Based on a combined HRTEM and capacitance-voltage (CV) analysis, employing a quantum-mechanical CV fitting procedure, we determine the dielectric constant (k) of HfO2 films, and associated interfacial SiOx layers, formed under various processing conditions. The k values are found to be 21.2 for HfO2 and 6.3 for the thinnest ( ∼ 6 A) SiOx interfacial layer. The cross-wafer variations in the physical and electrical properties of the HfO2 films are presented.

https://core.ac.uk/download/pdf/11309742.pdf

T. C. Q. Noakes

Papers

Electrical, structural, and chemical properties of HfO2 films formed by electron beam evaporation