The physics and technology of a relatively new, short‐time, thermal processing technique, namely rapid isothermal processing (RIP), based on incoherent sources of light for the fabrication of semiconductor devices and circuits, are reviewed in this paper. Low‐cost, minimum overall thermal budget, low‐power consumption, and high throughput are some of the attractive features of RIP. The discussion of RIP, in the context of other thermal processes, history, operating principles, different types of RIP systems, various applications of RIP using single processing steps, and novel applications of RIP, including in situ processing and multistep processing, is described in detail. Current trends are in the direction of RIP‐dominated silicon integrated circuit fabrication technology that can lead to the development of the most advanced three‐dimensional integrated circuits suitable for applications such as parallel processing and radiation hardening. RIP is not only a superior alternative to furnace processing, but it is also the only way to perform certain crucial steps in the processing of compound semiconductor devices such as high‐mobility transistors, resonant tunneling devices, and high‐efficiency solar cells. Development of more accurate temperature measurement techniques and theoretical studies of heat transfer and other fundamental processes are needed. Dedicated equipment designed for a specific task coupled with in situ processing capabilities will dominate the future direction of RIP.

Rapid isothermal processing

Survey Automatic control in microelectronics manufacturing: Practices, challenges, and possibilities

The fabrication of thin, sub-40 nm doped layers in Si with high concentrations of electrically active dopants and box-like profiles is a major technological challenge. Making these regions without introducing residual defects in the material and without affecting the properties of other material regions in the device is even more difficult. The need to control these properties of doping profiles in ultra-large-scale integrated (ULSI) circuits has driven the study of low energy implantation, transient enhanced diffusion (TED), and focused the search fornew shallow junction doping techniques. In this article, wereview the motivation for shallowjunctions, specific requirements for shallow junctions used in deep sub-micron dimension metal-oxide-semiconductor field effect transistors (MOSFETs), current understanding of implant and diffusion processes, and the state-of-the-art in low energy implantation and a number of alternate doping technologies, including plasma implantation, gas-immersion laser (GILD) doping, rapid vapor-phase doping (RVD), ion shower doping, and decaborane (B10H14) implantation.

Shallow junction doping technologies for ULSI

The problems of residual extended defects due to end‐of‐range ion implantation damage and mask edge lateral damage have been solved in this study for shallow boron junctions preamorphized via germanium ion implantation. Defect elimination has been achieved by adjusting the germanium ion energy, dose, and annealing temperature and ambient to minimize the local interstitial point defect concentration and optimize the role of the free surface in defect annihilation. For the combination of shallow, low dose 40 or 60 keV/2×1014 cm−2 Ge+ and 8 keV/1×1015 cm−2 B+ implants, a defect‐free structure was obtained following a 1050 °C, 10 s rapid thermal anneal (RTA) in a nonoxidizing Ar ambient. For these samples, boron profiles determined using secondary ion mass spectroscopy (SIMS) showed the junction depth to be approximately 0.17 μm at a background doping of 1×1017 cm−3 with a sheet resistance of 136 Ω/⧠.

Elimination of end‐of‐range and mask edge lateral damage in Ge+ preamorphized, B+ implanted Si

The influence of the lattice defects induced by silicon‐ion implantation on the B, P, As, and Sb diffusivities is investigated after annealing between 700 and 900 °C The nature and depth position of the residual implantation defects in undoped samples is determined by the analysis of the rocking curves obtained by triple‐crystal x‐ray diffraction and transmission electron microscopy In particular, besides the interstitial dislocation loops and clusters below the original amorphous‐crystal interface, the epitaxial regrowth of the amorphized silicon leaves a vacancy‐rich surface layer and a deeper region enriched in interstitials These regions correspond to those where Monte Carlo simulations of defect production foresee excess point defects Accordingly, as the dopant is located in correspondence with the vacancy or interstitial clusters, different behaviors of anomalous diffusion are observed In the deep region where an interstitial excess is present, B and P show marked enhanced diffusion, while only a small enhancement is exhibited by As and Sb On the contrary, retarded diffusivity for B and light enhancement for As and Sb are observed in the surface layer These different trends are consistent with the different accepted contributions of vacancies and interstitials to the diffusion mechanisms of the investigated dopants

Retarded and enhanced dopant diffusion in silicon related to implantation-induced excess vacancies and interstitials

These proceedings contain 54 papers grouped under the headings of: Implanted dopant activation and diffusion in silicon; Defects and microstructure; Equipment and device applications; Silicides and oxides; and Compound semiconductors

T.O. Sedgwick

Papers

Rapid thermal processing