Thierry Moreau

TL;DR: TVM as discussed by the authors is a compiler that exposes graph-level and operator-level optimizations to provide performance portability to deep learning workloads across diverse hardware back-ends, such as mobile phones, embedded devices, and accelerators.

TL;DR: TVM is proposed, an end-to-end optimization stack that exposes graph-level and operator-level optimizations to provide performance portability to deep learning workloads across diverse hardware back-ends and discusses the optimization challenges specific toDeep learning that TVM solves.

TL;DR: In this article, a learning-based framework is introduced to optimize tensor programs for deep learning workloads, such as matrix multiplication and high dimensional convolution, which are key enablers of effective deep learning systems.

TL;DR: SNNAP is designed to work with a compiler workflow that configures the neural network's topology and weights instead of the programmable logic of the FPGA itself, which enables effective use of neural acceleration in commercially available devices and accelerates different applications without costly FPGAs reconfigurations.

TL;DR: TVM is a compiler that exposes graph-level and operator-level optimizations to provide performance portability to deep learning workloads across diverse hardware back-ends and automates optimization of low-level programs to hardware characteristics by employing a novel, learning-based cost modeling method for rapid exploration of code optimizations.