The invention can enable monitoring of the display of content by a computer system. Moreover, the invention can enable monitoring of the displayed content to produce monitoring information from which conclusions may be deduced regarding the observation of the displayed content by an observer. The invention can also enable monitoring of the display at a content display site of content that is provided by a content provider site over a network to the content display site. Additionally, the invention can enable the expeditious provision of updated and/or tailored content over a network from a content provider site to a content display site so that the content provider's current and appropriately tailored content is always displayed at the content display site. Aspects of the invention related to transfer of content over a network are generally applicable to any type of network. However, it is contemplated that the invention can be particularly useful with a computer network, including private computer networks (e.g., America Online™) and public computer networks (e.g., the Internet). In particular, the invention can be advantageously used with computer networks or portions of computer networks over which video and/or audio content are transferred from one network site to another network site for observation, such as the World Wide Web portion of the Internet.

Content display monitor

Disclosed is a method of controlling the supply of a clock signal to a logic circuit, especially, a logic circuit composed of C-MOS gates for further reducing the power consumption. According to the control method, a clock signal supply inhibit instruction is stored, so that, when this instruction is read out, the supply of the clock signal to the logic circuit is inhibited, or its level is fixed at a specific signal level. In response to the application of an interrupt signal, the clock signal having been inhibited to be supplied to the logic circuit starts to be supplied to the logic circuit again. The circuit region or regions for which the supply of the clock signal is to be inhibited can be freely selected for the purpose of control. Thus, the method is especially effective when it is desired to closely control the saving of power consumed by the logic circuit.

Data processing apparatus with clock signal control by microinstruction for reduced power consumption and method therefor

A universal remotely controlled test interface test unit is adapted to be connected through plug connections to an on-site computing system having one or more central processing units and associated peripheral equipment. The test interface unit is provided with a limited function keyboard control for initiating tests and a transceiver for communicating with a data processing unit at a remote location which supplies format and control signals for use by the test interface unit and data signals to be communicated to the on-site computing system. The data signals received by the test interface unit are first entered into a buffer register to provide parallel outputs. The format control signals activate logic gating signals to cause the data signals in the buffer register to be arranged in a control register in a format which is compatible with the equipment to be tested. The control register is arranged to operate any part of the central processing system under test and any of its intended modes of operation and to initiate readout of information from any part of the computing system through the transceiver for processing and examination by the remotely located data processing unit.

Remote controlled test interface unit

A test automation system (Fig. 1) comprises storage and process components connected by file interfaces. BPLAN (103) creates and stores test descriptions in test information database (102). Tests are stored in test storage hierarchy (100). BSYNC (104) completes test descriptions in database (102) form contents of hierarchy (100). BQUERY (105) examines descriptions and selects tests for execution. TESTLOCS file (106) identifies selected tests. BQUERY (105) uses BBC (118) to communicate requests for tests and test descriptions to other systems. BBCMON (120) causes BQUERY (105) to satisfy requests and uses BBC (118) to communicate responses to requesting systems. BDLOAD (107) gathers tests identified by file (106) from hierarchy (100) into file (117) for downloading from host (10) to target (11) processor. BRUN (109) executes downloaded tests, collects test results in files (110-112), and reports result summaries. BULOAD (113) assembles files (110-112) into file (114) for uploading to processor (10). BSTORE (115) stores uploaded results in results database (116). BQUERY (105) examines test results collected in database (116).

Test automation system

A computer monitoring system connects into the channel, serving as a link between a CPU and peripheral devices. Channel signals are extracted in a channel interface module, altered to be compatible with the logic in a data collection module and sent to a data collection module along with event codes generated within the channel interface module to indicate certain sequences and/or combinations of signals occurring on the channel. The data collection module is programmable to select those peripheral devices it wants to monitor and the type of information to be collected.

Computer monitoring system

A digital monitor for monitoring the operation of a synchronous digital system. Proper operation of the monitored digital system is determined by storing a predetermined sequence of digital numbers in a memory. The bit patterns generated by the system being monitored are utilized as addresses to read the stored digital numbers. After each read cycle the digital number read from the memory is examined to determine if it has the proper value. If the value is not proper, a memory is set indicating that the system being monitored has malfunctioned. Additionally, the number of bit patterns checked during each cycle of the system is determined. If the correct number of patterns are not checked, the memory is also set indicating that a malfunction has occurred. Apparatus for monitoring a selected number of analog signals such as power supply voltages is also provided. Either of these tests may be inhibited by signals from the system being monitored or by signals from an external source.

Digital monitor having memory readout by the monitored system

A testing system wherein a digital computer controls programmable testing devices which supply signals to, and receive signals from, a unit under test. Buffer interface equipment is connected to three input/output channels of the computer and includes a plurality of storage registers connected to the various programmable test devices. Information to be supplied to the test devices is received via one input/output channel and placed into storage. Test results are also placed into storage and transmitted back to the computer for analysis via a second channel. The third channel contains address information for selecting which storage registers receive or transmit the digital signals.

Thomas A. Keller

Papers

Digital monitor having memory readout by the monitored system

Universal buffer interface for computer controlled test systems