An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Semiconductor device, and manufacturing method thereof

The market for driver assistance systems based on millimeter-wave radar sensor technology is gaining momentum. In the near future, the full range of newly introduced car models will be equipped with radar based systems which leads to high volume production with low cost potential. This paper provides background and an overview of the state of the art of millimeter-wave technology for automotive radar applications, including two actual silicon based fully integrated radar chips. Several advanced packaging concepts and antenna systems are presented and discussed in detail. Finally measurement results of the fully integrated radar front ends are shown.

Millimeter-Wave Technology for Automotive Radar Sensors in the 77 GHz Frequency Band

This paper presents Soli, a new, robust, high-resolution, low-power, miniature gesture sensing technology for human-computer interaction based on millimeter-wave radar. We describe a new approach to developing a radar-based sensor optimized for human-computer interaction, building the sensor architecture from the ground up with the inclusion of radar design principles, high temporal resolution gesture tracking, a hardware abstraction layer (HAL), a solid-state radar chip and system architecture, interaction models and gesture vocabularies, and gesture recognition. We demonstrate that Soli can be used for robust gesture recognition and can track gestures with sub-millimeter accuracy, running at over 10,000 frames per second on embedded hardware.

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Soli: ubiquitous gesture sensing with millimeter wave radar

A method for operating a voice trigger is provided. In some implementations, the method is performed at an electronic device including one or more processors and memory storing instructions for execution by the one or more processors. The method includes receiving a sound input. The sound input may correspond to a spoken word or phrase, or a portion thereof. The method includes determining whether at least a portion of the sound input corresponds to a predetermined type of sound, such as a human voice. The method includes, upon a determination that at least a portion of the sound input corresponds to the predetermined type, determining whether the sound input includes predetermined content, such as a predetermined trigger word or phrase. The method also includes, upon a determination that the sound input includes the predetermined content, initiating a speech-based service, such as a voice-based digital assistant.

Voice trigger for a digital assistant

Packaging methods and structures for semiconductor devices that utilize a novel die attach film are disclosed. In one embodiment, a method of packaging a semiconductor device includes providing a carrier wafer and forming a die attach film (DAF) that includes a polymer over the carrier wafer. A plurality of dies is attached to the DAF, and the plurality of dies is packaged. At least the carrier wafer is removed from the packaged dies, and the packaged dies are singulated.

Packaging methods and structures using a die attach film

The main challenges of today's device packaging are miniaturization, continuously increasing operating frequencies/high data rates, high number of I/Os, reliability, and thermal requirements. One of the major package trends driven by mobile-phone applications is the Wafer Level Ball Grid Array (WLB). Drivers for the implementation of WLB technology are cost reduction, smaller form factor and better electrical performance with respect to high frequency applications. Thin-film WLB technology consists in realizing additional redistribution layers above the passivation of a semiconductor chip using standard thin-film techniques to rearrange peripheral pads on the wafer in an array pattern. A hard limit will be reached with this technology, when the number of I/Os reaches a larger number dian can be fitted on the silicon chip at a given pitch. We introduce Infineon's embedded Wafer Level Ball Grid Array technology, which allows fitting interconnects onto a so-called fan-out area extending the chip area. The core process of this emerging technology is the encapsulation of silicon dice by compression molding. The eWLB technology is a forward-looking development of the WLB technology, upholding the known benefits such as small package dimensions, excellent electrical and thermal performance, and maximum connection density. However, this technology significantly increases the functionality and application spread. Due to eWLB. complex semiconductor chips such as modem and processor chips for applications in mobile communications require a high number of solder connections with standardized contact spacing to be produced with a minimal footprint. At the same time, the packages can be provided with as many solder contacts as needed. The possibility of additional wiring area around the chip proper means that the wafer-level packaging technology also lends itself to new. space-sensitive applications. We demonstrate the capabilities of Infineon's molded embedded Wafer Level Package Technology and show how we extended it towards a Platform Technology. The qualified Platform we introduce here covers currently a range of package sizes up to 8×8mm2 at a ball pitch of 0.5mm. The Qualification Criteria we have applied follow the tests described in JEDEC Standard Number 26-A.

Embedded wafer level ball grid array (eWLB)

We report an innovative embedded device wafer level packaging technology based on a "molded reconfigured 200 mm wafer". Silicon dice are tested, grinded, and diced. For the set-up of the "reconfigured wafer" these bare silicon dice are placed faces down onto a carrier system. The core process of this technology is the encapsulation of silicon dice. We demonstrate that compression molding is a promising approach with respect to robust processing, topology, adhesion, and reliability properties. The "molded reconfigured wafer" is the base to apply thin-film interconnects similar to back-end of line processes.

An embedded device technology based on a molded reconfigured wafer

The main challenges of today's device packaging are miniaturization, continuously increasing operating frequencies/high data rates, high number of I/Os, reliability, and thermal requirements One of the major package trends driven by mobile-phone applications is the Wafer Level Ball Grid Array (WLB) Drivers for the implementation of WLB technology are cost reduction, smaller form factor and better electrical performance with respect to high frequency applications Thin-film WLB technology consists in realizing additional redistribution layers above the passivation of a semiconductor chip using standard thin-film techniques to rearrange peripheral pads on the wafer in an array pattern A hard limit will be reached with this technology, when the number of I/Os reaches a larger number dian can be fitted on the silicon chip at a given pitch We introduce Infineon's embedded Wafer Level Ball Grid Array technology, which allows fitting interconnects onto a so-called fan-out area extending the chip area The core process of this emerging technology is the encapsulation of silicon dice by compression molding The eWLB technology is a forward-looking development of the WLB technology, upholding the known benefits such as small package dimensions, excellent electrical and thermal performance, and maximum connection density However, this technology significantly increases the functionality and application spread Due to eWLB complex semiconductor chips such as modem and processor chips for applications in mobile communications require a high number of solder connections with standardized contact spacing to be produced with a minimal footprint At the same time, the packages can be provided with as many solder contacts as needed The possibility of additional wiring area around the chip proper means that the wafer-level packaging technology also lends itself to new space-sensitive applications We demonstrate the capabilities of Infineon's molded embedded Wafer Level Package Technology and show how we extended it towards a Platform Technology The qualified Platform we introduce here covers currently a range of package sizes up to 8×8mm2 at a ball pitch of 05mm The Qualification Criteria we have applied follow the tests described in JEDEC Standard Number 26-A

Embedded Wafer Level Ball Grid Array (eWLB)

A method for fabricating a device, a semiconductor chip package, and a semiconductor chip assembly is disclosed. One embodiment includes applying at least one semiconductor chip on a first form element. At least one element is applied on a second form element. A material is applied on the at least one semiconductor chip and on the at least one element.

Semiconductor chip package, semiconductor chip assembly, and method for fabricating a device

A semiconductor structure and a method for forming the semiconductor structure, including a semiconductor chip and a conductive layer disposed over a portion of the chip, the conductive layer having a portion that extends beyond an edge of the chip. The chip includes a device, which can be an integrated circuit or a micro-mechanical device. The structure can also include a front layer extending beyond the edge of the chip, the conductive layer being disposed on the front layer.

Thorsten Meyer

Papers

Embedded wafer level ball grid array (eWLB)

An embedded device technology based on a molded reconfigured wafer

Embedded Wafer Level Ball Grid Array (eWLB)

Semiconductor chip package, semiconductor chip assembly, and method for fabricating a device

Transfer wafer level packaging