Injection locking characteristics of oscillators are derived and a graphical analysis is presented that describes injection pulling in time and frequency domains. An identity obtained from phase and envelope equations is used to express the requisite oscillator nonlinearity and interpret phase noise reduction. The behavior of phase-locked oscillators under injection pulling is also formulated.

/pdf/a-study-of-injection-locking-and-pulling-in-oscillators-43lsvme4nh.pdf

A study of injection locking and pulling in oscillators

Underlying physical mechanisms controlling the noise properties of oscillators are studied. This treatment shows the importance of inductance selection for oscillator noise optimization. A design strategy centered around an inductance selection scheme is executed using a practical graphical optimization method to optimize phase noise subject to design constraints such as power dissipation, tank amplitude, tuning range, startup condition, and diameters of spiral inductors. The optimization technique is demonstrated through a design example, leading to a 2.4-GHz fully integrated, LC voltage-controlled oscillator (VCO) implemented using 0.35-/spl mu/m MOS transistors. The measured phase-noise values are -121, -117, and -115 dBc/Hz at 600-kHz offset from 1.91, 2.03, and 2.60-GHz carriers, respectively. The VCO dissipates 4 mA from a 2.5-V supply voltage. The inversion mode MOSCAP tuning is used to achieve 26% of tuning range. Two figures of merit for performance comparison of various oscillators are introduced and used to compare this work to previously reported results.

/pdf/concepts-and-methods-in-optimization-of-integrated-lc-vcos-21e0f32gpk.pdf

Concepts and methods in optimization of integrated LC VCOs

The concept of concurrent multiband low-noise-amplifiers (LNAs) is introduced. A systematic way to design concurrent multiband integrated LNAs in general is developed. Applications of concurrent multiband LNAs in concurrent multiband receivers together with receiver architecture are discussed. Experimental results of a dual-band LNA implemented in a 0.35-/spl mu/m CMOS technology as a demonstration of the concept and theory is presented.

/pdf/concurrent-multiband-low-noise-amplifiers-theory-design-and-1iy48rdapl.pdf

Concurrent multiband low-noise amplifiers-theory, design, and applications

This paper presents a quadrature voltage-controlled oscillator (QVCO) based on the coupling of two LC-tank VCOs A simplified theoretical analysis for the oscillation frequency and phase noise displayed by the QVCO in the 1/f/sup 3/ region is developed, and good agreement is found between theory and simulation results A prototype for the QVCO was implemented in a 035-/spl mu/m CMOS process with three standard metal layers The QVCO could be tuned between 164 and 197 GHz, and showed a phase noise of -140 dBc/Hz or less across the tuning range at a 3-MHz offset frequency from the carrier, for a current consumption of 25 mA from a 2-V power supply The equivalent phase error between I and Q signals was at most 025/spl deg/

/pdf/analysis-and-design-of-a-1-8-ghz-cmos-lc-quadrature-vco-3tacbqcgff.pdf

Analysis and design of a 1.8-GHz CMOS LC quadrature VCO

We show that the quadrature LC oscillator is best treated as two strongly coupled, nominally identical oscillators that are locked to the same frequency. Differential equations that extend Adler's description of locking to strong injection reveal the full dynamics of this circuit. With a simplifying insight, the analysis reveals all the modes of the oscillator, their stability, the effects of mismatch on quadrature phase accuracy, and through a novel use of the analysis, phase noise.

The Quadrature LC Oscillator: A Complete Portrait Based on Injection Locking

Incorporating the direct-conversion architecture, a 5-GHz band radio transceiver front end chipset for wireless LAN applications is implemented in a 0.25-/spl mu/m CMOS technology. The 4-mm/sup 2/ 5.25-GHz receiver IC contains a low noise amplifier with 2.5-dB noise figure (NF) and 16-dB power gain, a receive mixer with 12.0 dB single sideband NF, 13.7-dB voltage gain, and -5 dBm input 1-dB compression point. The 2.7-mm/sup 2/ transmitter IC achieves an output 1-dB compression of -2.5 dBm at 5.7 GHz with 33.4-dB (image) sideband rejection by using an integrated quadrature voltage-controlled oscillator. Operating from a 3-V supply, the power consumptions for the receiver and transmitter are 114 and 120 mW, respectively.

5 GHz CMOS radio transceiver front-end chipset

Phase noise and frequency tuning range are key performance parameters of high-frequency voltage-controlled oscillators (VCOs). To achieve low phase noise, LC sinusoidal oscillators with high quality factor (Q) are preferred to other topologies, such as inverter-based ring oscillators. The frequency tuning of LC oscillators can be readily achieved with varactor diodes either on-chip or external. The frequency tuning range is often limited by low supply voltage and maximum variable capacitance available to varactors at high frequencies when on-chip inductors are used. Other frequency tuning approaches include varying current in the resonator to alter effective capacitance, or varying relative weighting between two different LC resonators. While the former approach varies loop gain in addition to the phase, the latter requires careful choice of the resonators and their Qs for stable oscillations. This VCO architecture incorporates two coupled fixed-frequency LC oscillators to generate a variable-frequency output by varying the coupling between two oscillators.

Ting-Ping Liu

Papers

5 GHz CMOS radio transceiver front-end chipset

A 6.5 GHz monolithic CMOS voltage-controlled oscillator