Showing papers by "Tom Leighton published in 1994"

Improved approximation algorithms for the multi-commodity flow problem and local competitive routing in dynamic networks

Abstract: Improved Approximation Algorithms the Multi-Commodity Flow Problem and Competitive Routing in Dynamic Networks

On-line admission control and circuit routing for high performance computing and communication

Abstract: This paper considers the problems of admission control and virtual circuit routing in high performance computing and communication systems. Admission control and virtual circuit routing problems arise in numerous applications, including video-servers, real-lime database servers, and the provision of permanent virtual channel in large-scale communications networks. The paper describes both upper and lower bounds on the competitive ratio of algorithms for admission control and virtual circuit routing in trees, arrays, and hypercubes (the networks most commonly used in conjunction with nigh performance computing and communication). Our results include optimal algorithms for admission control and virtual circuit routing in trees, as well as the first competitive algorithms for these problems on non-tree networks. A key result of our research is the development of on-line algorithms that substantially outperform the greedy-based approaches that are used in practice. >

On the design of reliable Boolean circuits that contain partially unreliable gates

Abstract: We investigate a model of gate failure for Boolean circuits in which a faulty gate is restricted to output one of its input values. For some types of gates, the model (which we call the short-circuit model of gate failure) is weaker than the traditional von Neumann model where faulty gates always output precisely the wrong value. Our model has the advantage that it allows us to design Boolean circuits that can tolerate worst-case faults, as well as circuits that have arbitrarily high success probability in the case of random faults. Moreover, the short-circuit model captures a particular type of fault that commonly appears in practice, and it suggests a simple method for performing post-test alterations to circuits that have more severe types of faults. A variety of bounds on the size of fault-tolerant circuits are proved in the paper. Perhaps, the most important is a proof that any k-fault-tolerant circuit for any input-sensitive function using any type of gates (even arbitrarily powerful, multiple-input gates) must have size at least /spl Omega/(k log k/log log k). Obtaining a tight bound on the size of a circuit for computing the AND of two values if up to k of the gates are faulty is one of the central questions left open in the paper. >

Scalable expanders: exploiting hierarchical random wiring

Abstract: Recent work has shown marry advantages to randomly wired expander-based networks. Unfortunately, the win”ng complexity of such networks becomesphysically problematic as they become large. This paper introduces a technique for sca3ing expanders that avoids this wirr”ng complexity. Specifically, we make the following contributions: 1. We introduce hierarchical expanders, which use a method of scaling small expanders to larger ones while ma”nta”m”ng practical physical construction. We present an example of such a scalable network, called the metabutterjly, which is scaled from the randomJy wired multibutterfly. 2. We present a proof that we can scale any (cY,/?, M, N)exprmder with dbf > 1 into an (a’,,@, kM, kN) -expander with probability at least 1 – 2e–a M, where a’ = ~2e~~4=

Secret-Key Agreement without Public-Key Cryptography (Extended Abstract)

Abstract: In this paper, we describe novel approaches to secret-key agreement. Our schemes are not based on public-key cryptography nor number theory. They are extremely efficient implemented in software or make use of very simple uuexpeusive hardware. Our technology is particularly well-suited for use in cryptographic scenarios like those of the Clipper Chip, the recent encryption proposal put forward by the Clinton Administration.

Methods for message routing in parallel machines

Abstract: In this paper, we survey many of the approaches that have been proposed for solving communication problems in parallel machines. The material is presented from a theoretician's perspective, although the paper was written for a general audience.

Minimal adaptive routing on the mesh with bounded queue size

Abstract: An adaptive routing algorithm is one in which the path a packet takes from its source to its destination may depend on other packets it encounters Such algorithms potentially avoid network bottlenecks by routing packets around “hot spots” Minimal adaptive routing algorithms have the additional advantage that the path each packet takes is a shortest oneFor a large class of minimal adptive routing algorithms, we present an O(n2/k2) bound on the worst case time to route a static permutation of packets on an n × n mesh or torus with nodes that can hold up to k ≥ 1 packets each This is the first nontrivial lower bound on adaptive routing algorithms The argument extends to more general routing problems, such as the h-h routing problem It also extends to a large class of dimension order routing algorithms, yielding an O(n2/k) time boundTo complement these lower bounds, we present two upper bounds One is an O(n2/k) time dimension order routing algorithm that matches the lower bound The other is the first instance of a minimal adaptive routing algorithm that achieves O(n) time with constant sized queues per node We point out why the latter algorithm is outside the model of our lower bounds

Scheduling trees using FIFO queues: a control-memory tradeoff

Abstract: We study a combinatorial problem that is motivated by ‘(client-server” schedulers for networks of workstations. Using a number of FIFO quet~es the scheduler is required to schedule ~-leaf binary (or any fixed degree) trees in such a way that each nonleaf node of the tree being scheduled is executed before its children. We establish a tradeoff between the number of queues used by the algorithm — which we view as measuring the control complexity of the algorithm — and the memory requirements of the algorithm, as embodied in the required capacity of the largestcapacity queue. Let ~k (N) denote the minimax per-queue capacity for a k-queue algorithm that schedules all N-leaf binary trees, and let Q~ (N) denote the analogous quantity for complete binary trees. We establish the following bounds. For all N, k < log N,

A 2 d - 1 Lower Bound for Two-Layer Knock-Knee Channel Routing

Abstract: This paper describes a two-point net channel routing problem with density d that requires channel width 2d-1 in the two-layer knock-knee channel routing model. This means that the (2d-1)-track algorithms of Rivest, Baratz, and Miller [1981 CMU Conference on VLSI Systems and Computations, Oct. 198 1, pp. 153-159], Bolognesi and Brown [unpublished manuscript, Coordinated Science Laboratory, University of Illinois at Urbanna-Charnpaign, 1982], Frank [Combinatorica, 2 (1982), pp. 361-37], Mehlhorn, Preparata, and Sarrafzadeh [University of Saarbrucken Tech. Rep., Saarbrucken, Germany, Nov. 1984], and Berger et al. [J. Assoc. Comput. Mach., 1994, to appear], are, in some cases, optimal. Thus, any improvement of these algorithms must rely on problem features other than density (such as flux [Advances in Computing Research 2 (VLSI Theory), F. P. Preparata, ed., JAI Press, Greenwich, CT, 1984, pp. 205-229]) or must make fundamental changes in the wiring model (such as increasing the number of layers [IEEE Trans. Comput., C-33 (1984), pp. 427-437) or allowing wires to overlap [see Berger et al., above], [Algorithmica, 1 (1986), pp. 223-232]).