U
Uk-Rae Cho
Researcher at Samsung
Publications - 51
Citations - 573
Uk-Rae Cho is an academic researcher from Samsung. The author has contributed to research in topics: Signal & High impedance. The author has an hindex of 13, co-authored 51 publications receiving 565 citations.
Papers
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Journal ArticleDOI
A 0.7-fJ/bit/search 2.2-ns search time hybrid-type TCAM architecture
Sungdae Choi,Kyomin Sohn,Min-Wuk Lee,Sunyoung Kim,Hye-Mi Choi,Dong-Hyun Kim,Uk-Rae Cho,Hyun-Geun Byun,Yun-Seung Shin,Hoi-Jun Yoo +9 more
TL;DR: A hidden bank selection scheme is proposed to activate limited amount of cells during the search operation avoiding additional timing penalty, and match fine repeaters and sub-match fine scheme are used for fast NAND search operation.
Patent
Programmable impedance control circuit
Nam-Seog Kim,Uk-Rae Cho +1 more
TL;DR: In this article, a programmable impedance control circuit, comprising a voltage divider, an MOS array supplied with a first voltage and an external resistance having an external impedance equal to N times said external resistance, is described.
Patent
Impedance control circuit
Nam-Seog Kim,Uk-Rae Cho +1 more
TL;DR: In this article, the authors propose an impedance control circuit that reduces the impedance variance when an external impedance generated from an external resistor is matched to internal impedance by using a comparator.
Proceedings ArticleDOI
28nm high- metal-gate heterogeneous quad-core CPUs for high-performance and energy-efficient mobile application processor
Youngmin Shin,Ken Shin,P. Kenkare,Rajesh Kashyap,Hoi-Jin Lee,Dongjoo Seo,Brian Millar,Yohan Kwon,Ravi Iyengar,Min-Su Kim,Ahsan Chowdhury,Sung-il Bae,Inpyo Hong,Wookyeong Jeong,A. Lindner,Uk-Rae Cho,Keith Hawkins,Jae Cheol Son,Seung Ho Hwang +18 more
TL;DR: In order to support the wide range of performance required by today's mobile devices, a heterogeneous dual-CPU configuration comprising a high-performance CPU and an energy-efficient CPU can be one of the most energy efficient solutions for accomplishing both high-intensity and low-intensity tasks.
Patent
Semiconductor device with programmable impedance control circuit
TL;DR: An output impedance control circuit of a semiconductor device is described in this paper, where a first transistor is connected to a pad, and a level controller controls a gate voltage of the first transistor in response to a voltage of a pad and a reference voltage.