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Showing papers by "Ulrich Meyer published in 1997"


Journal Article
TL;DR: The strategy is simple enough to be implemented, but details of the available hardware are not favorable, however, alternative algorithms, designed along the same lines, give an improvement on the Intel Paragon.
Abstract: Matrix transpose is a fundamental communication operation which is not dealt with optimally by general purpose routing schemes. For two dimensional meshes, the first optimal routing schedule is given. The strategy is simple enough to be implemented, but details of the available hardware are not favorable. However, alternative algorithms, designed along the same lines, give an improvement on the Intel Paragon.

9 citations


Proceedings ArticleDOI
01 Apr 1997
TL;DR: In this article, the first optimal routing schedule for two dimensional meshes is given, which is simple enough to be implemented, but details of the available hardware are not favorable, and alternative algorithms, designed along the same lines, give an improvement on the Intel Paragon.
Abstract: Matrix transpose is a fundamental communication operation which is not dealt with optimally by general purpose routing schemes. For two dimensional meshes, the first optimal routing schedule is given. The strategy is simple enough to be implemented, but details of the available hardware are not favorable. However, alternative algorithms, designed along the same lines, give an improvement on the Intel Paragon.

7 citations



01 Jan 1997
TL;DR: In this article, the first optimal routing schedule for two dimensional meshes is given, which is simple enough to be implemented, but details of the available hardware are not favorable, and alternative algorithms, designed along the same lines, give an improvement on the Intel Paragon.
Abstract: Matrix transpose is a fundamental communication operation which is not dealt with optimally by general purpose routing schemes. For two dimensional meshes, the first optimal routing schedule is given. The strategy is simple enough to be implemented, but details of the available hardware are not favorable. However, alternative algorithms, designed along the same lines, give an improvement on the Intel Paragon.