Ionization front propagation in a high-voltage reversely biased silicon p-n diode is the fastest nonoptical process of electron-hole plasma generation in semiconductors. It is capable of switching a high-voltage semiconductor structure from the blocking to the conducting state within several hundreds of picoseconds. Double-donor electron traps with ionization energies of 0.28 and 0.54 eV are the main source of carriers which initiate formation and propagation of these fronts. Dinistor n+ -p-n-p+ structures with such a switching mechanism are capable of generating electric pulses with several kiloamperes of amplitude and nanosecond and even subnanosecond pulse rise time. High-power pulse generators based on these devices have been developed and found applications in many modern technologies. Our numerical simulations indicate a possibility to excite new types of impact ionization fronts which are capable of switching high-voltage devices within dozens of picoseconds.

Pulse Power Generation in Nano- and Subnanosecond Range by Means of Ionizing Fronts in Semiconductors: The State of the Art and Future Prospects

Power kilovolt electric pulses with subnanosecond rise time can be formed by means of semiconductor switches based on the propagation of ionization fronts in Si structures. We describe a new generation of such devices-which are deep-level dynistors (DLDs). The triggering of the ionization front in the DLDs occurs due to the field-enhanced ionization of deep-level electron traps. The DLDs are able to form high-current pulses with subnanosecond rise time and low residual voltage just after switching. We describe two power generators based on the DLDs as examples. In addition, we discuss the possibility of picosecond switching based on tunneling-assisted impact-ionization fronts.

Novel Closing Switches Based on Propagation of Fast Ionization Fronts in Semiconductors

A mode of impact ionization breakdown of a p–n junction is suggested: We demonstrate that when a sufficiently sharp voltage ramp is applied in reverse direction to an initially unbiased equilibrium p+–n–n+ structure, after some delay the system will reach a high conductivity state via the propagation of a superfast impact ionization front. The front travels towards the anode with a velocity vf several times larger than the saturated drift velocity of electrons vs leaving a dense electron–hole plasma behind. The excitation of the superfast front corresponds to the transition from the common avalanche breakdown of a semiconductor structure to a collective mode of streamer-like breakdown. We propose that similar fronts can be excited not in layered structures but in plain bulk samples without p–n junctions. Our numerical simulations apply to a Si structure with typical thickness of W∼100 μm switched in series with a load R∼100 Ω, with a voltage ramp of A>1012 V/s applied to the whole system. Our simulations ...

/pdf/superfast-fronts-of-impact-ionization-in-initially-unbiased-1dblymcec9.pdf

Superfast fronts of impact ionization in initially unbiased layered semiconductor structures

We present results of numerical simulations of superfast impact ionization fronts in initially unbiased layered semiconductor structures.We demonstrate that when a sufficiently sharp voltage ramp $A > 10^{12} ; {
m V/s}$ is applied in the reverse directionto an initially unbiased Si $p^{+}-n-n^{+}$-structure connected in series with a load $R$, then after some delay the system will reach the high conductivity state via the propagation of a superfast impact ionization frontwhich leaves a dense electron-hole plasma behind.The front travels towards the anode with a velocity $v_f$ several times largerthan the saturated drift velocity of electrons $v_s$.The excitation of the superfast front corresponds to the transitionfrom the common avalanche breakdown of a semiconductor structure toa collective mode of streamer-like breakdown.For a structure with typical thickness of$W sim 100 ; {
m mu m}$, first there is a delay of about$1 ; {
m ns}$ during which the voltage reaches a value ofseveral kilovolts. Then, as the front is triggered, the voltageabruptly breaks down to several hundreds of voltswithin $sim 100 ; {
m ps}$. This provides a voltage rampof up to $sim 2 cdot 10^{13}; {
m V/s}$, hence up to 10times sharper than the externally applied ramp.We unravel the source of initial carriers which trigger the frontand explain the origin of the time delay in triggering the front.Further we identify the mechanism of front propagation and discussthe possibility to excite superfast ionizationfronts not in layered structures but in bulk semiconductors.

/pdf/superfast-fronts-of-impact-ionization-in-initially-unbiased-47btjpupnu.pdf

We investigate the origin of free carriers that initiate impact ionization in depleted high-voltage p-n junctions under dynamic breakdown conditions and deterministically trigger superfast ionization fronts that propagate several times faster than the saturated drift velocity. We argue that in Si structures triggering occurs due to the field-enhanced ionization of process-induced deep-level centers identified as sulfur impurities. This impurity is a double-level electron trap with low recombination activity. It is present in high-voltage Si structures due to the side effect of widely used fabrication technology. We calculate the field and temperature dependences of the ionization probability for the upper midgap level (0.28eV) and midgap level (0.54eV) in electric fields up to 5×105V∕cm as well as the occupation of these levels at different temperatures. The emission of free electrons is sufficient to trigger the ionization front from zero temperature to ∼400K, in agreement with experiments. At room tempe...

Field-enhanced ionization of deep-level centers as a triggering mechanism for superfast impact ionization fronts in Si structures

Deep-level defects appear in silicon upon heat treatment of wafers with surface disordered by mechanical lapping or introducing high concentration impurity in diffusion layer, i.e. in regimes typical of fabrication of high voltage devices. By means of capacitance transient spectroscopy, combined with other methods, it was shown that dominant electron traps with ionization energies of 0.28 and 0.54 eV of double level donor have low recombination activity, but affect the resistivity of high purity Si and play a key role in limiting the p-n junction breakdown voltage . A careful study of the defect parameters showed their similarity to sulphur-related centres in Si.

http://iopscience.iop.org/article/10.1088/0268-1242/13/5/008/pdf

Process induced deep-level defects in high purity silicon

We have identified a p-type layer on both sides of the interface formed by two directly bonded silicon wafers. The thickness and the hole concentration of the p-layer vary with the pretreatment of the wafer surface, temperature and bonding time. It is shown that the p-layer is formed by the diffusion of uncontrollable Al impurities adsorbed on the hydrophilic silicon surface. The layer is responsible for the barrier properties of the interface in n+-n and n-n structures and for a large p-n junction depth in bonded wafers with different types of conductivity.

https://iopscience.iop.org/article/10.1088/0268-1242/8/9/004/pdf

Effect of chemical surface treatment on p-layer formation in the interface region of directly bonded Si wafers

Using N-type silicon wafers ( ϱ ∼ 1.7–2 k Ω cm , 40 mm diameter and 3.5 mm thickness) P−N junctions with a breakdown voltage exceeding 20 kV have been manufactured. Applying a combination of slow-heating, slow-cooling and using polished float-zone Si and phosphorous silicon oxide glass layers for gettering the thermal defects, it was possible to avoid a change in resistivity of the n-layer and to fabricate devices with an ideal blocking capability.

V. B. Voronkov

Papers

Process induced deep-level defects in high purity silicon

Effect of chemical surface treatment on p-layer formation in the interface region of directly bonded Si wafers

Ultrahigh voltage silicon P−N junctions with a breakdown voltage above 20 kV