Silicon photonics integrated circuits are considered to enable future computing systems with optical input-outputs co-packaged with CMOS chips to circumvent the limitations of electrical interfaces. In this paper we present the recent progress made to enable dense multiplexing by exploiting the integration advantage of silicon photonics integrated circuits. We also discuss the manufacturability of such circuits, a key factor for a wide adoption of this technology.

Silicon photonics integrated circuits: a manufacturing platform for high density, low power optical I/O's.

Unlike ultralong coherent optical systems that seriously suffer from fiber nonlinearities, short-reach noncoherent systems such as data center interconnections, which utilize small, cheap, and low-bandwidth components, are sensitive to nonlinearities that are mainly produced by devices responsible for electrical signal amplification, modulation, and demodulation. One of the most promising schemes for these applications is the four-level pulse amplitude modulation format combined with intensity modulation and direct detection; however, it can be significantly degraded by linear and nonlinear intersymbol interference. Linear and nonlinear signal degradation can efficiently be handled by different types of equalizers. In many cases, the straightforward linear equalizer cannot lower the error rate at the acceptable level. Therefore, much stronger equalizers based on nonlinear models such as the Volterra series are proposed. Volterra filter that can also be orthogonalized by the Wiener model is well described in the existing literature, and, in this paper, we investigate the most critical points related to high-speed Volterra filter design and implementation. Several experiments are carried out in order to indicate filter requirements/complexity, acquisition, and stability. We also provide a simple guidance for filter complexity reduction and useful hints for channel acquisition.

Volterra and Wiener Equalizers for Short-Reach 100G PAM-4 Applications

Embodiments include a decision feedback equalizer (DFE) circuit, including at least one reorder block configured to reorder a set of current sliced bit values based on one or more previous sliced bit values, and a selector configured to select one of the reordered current sliced bit values as a DFE output based on a group of non-adjacent DFE outputs.

Equalizer with reorder

Data center and cloud architectures continue to evolve to address the needs of large-scale multi-tenant data centers and clouds. These needs are centered around seven dimensions: scalability in computing, storage, and bandwidth, scalability in network services, efficiency in resource utilization, agility in service creation, cost efficiency, service reliability, and security. This article focuses on the first five dimensions as they pertain to networking. Large data centers are targeting support for tens of thousands of servers, exabytes of storage, terabits per second of traffic, and tens of thousands of tenants. In a data center, server and storage resources are interconnected with packet switches and routers that provide for the bandwidth and multi-tenant virtual networking needs. Data centers are interconnected across the wide area network via routing and transport technologies to provide a pool of resources, known as the cloud. High-speed optical interfaces and dense wavelength-division multiplexing optical transport are used to provide for high-capacity transport intra- and inter-datacenter. This article reviews various switching, routing, and optical transport technologies, and their applicability in addressing the networking needs of large-scale multi-tenant data centers.

Technologies and protocols for data center and cloud networking

In this paper, we present the design and analysis of an adaptive cost-effective discrete multitone transponder (DMT) using direct detection (DD) suitable for data center interconnections. Levin Campello margin adaptive (LC-MA) algorithm is applied to the transponder digital signal processing modules to enhance fiber chromatic dispersion (CD) resilience, while achieving high-data rate transmission. The bit error rate (BER) performance and the rate/distance adaptive capabilities of the proposed transponder have been numerically analyzed and compared to bandwidth variable uniform loading, taking into account the transmission impairments at the varying of the fiber length. Specifically, the performance of the designed transponder has been assessed from $20$
 to $112$
 Gb/s, extending the achievable reach at $50$
 Gb/s beyond $80$
 km of standard single mode fiber (SSMF). The numerical simulations have been compared with experimental results, evidencing good agreement in presence of transmission impairments.

DMT Modulation With Adaptive Loading for High Bit Rate Transmission Over Directly Detected Optical Channels

Higher-order modulation is being studied for future 100G, 400G, and faster client optics. Amplitude, phase, and multi-subcarrier modulation approaches, used separately and in combination with each other, are being considered. Increased penalties due to higher-order modulation greater sensitivity to link impairments require use of DSP algorithms implemented in advanced CMOS nodes to close the link budget. DSP also enables programmability to reconfigure the optics for different applications and link conditions.

Higher-order modulation for client optics

An apparatus is disclosed that includes first transceiver circuitry adapted for transmitting and receiving Ethernet data over a network using a first Ethernet communication protocol at a first data rate, second transceiver circuitry adapted for transmitting and receiving Ethernet data over a network using a second Ethernet communication protocol at a second data rate; and third transceiver circuitry adapted for transmitting and receiving Ethernet data over a network using a third Ethernet communication protocol at a third data rate.

Multi-rate backplane transceiver

Embodiments include a system for performing dispersion compensation on an electromagnetic signal received over a communication channel, the electromagnetic signal bearing information at a symbol rate. An interleaved analog to digital converter (“ADC”) block may be used, wherein the interleaved ADC block may be configured to generate a plurality of digitally sampled signals from the electromagnetic signal. An interleaved equalizer block may be configured to digitally process each of the digitally sampled signals generated by the ADC block to generate a plurality of digitally equalized signals. A multiplexer may be configured to aggregate the digitally equalized signals into a composite output signal.

Phase control for interleaved analog-to-digital conversion for electronic dispersion compensation

Embodiments include a system for performing electronic dispersion compensation on an information-bearing signal transmitted over a communication channel. The system may include a channel identification module configured to receive a first digitized version of the information bearing signal and an equalized version of the information-bearing signal, and may be configured to determine an impulse response of the communication channel based thereon. The system may include a time varying phase detector configured to receive the equalized version of the information bearing signal, a second digitized version of the information-bearing signal, and the impulse response, and may be further configured to generate a reference wave based on the impulse response and the equalized version of the information-bearing signal. The time varying phase detector may be configured to generate a phase signal based on the reference wave and on an error signal determined from the reference wave and the second digitized version of the information-bearing signal.

Electronic dispersion compensation utilizing interleaved architecture and channel identification for assisting timing recovery

A short reach communication system includes a plurality of communication SERDES that communicate data over a short reach channel medium such as a backplane connection (e.g., PCB trace) between, for example, chips located on a common PCB. A multi-level modulated data signal is generated to transmit/receive data over the short reach channel medium. Multi-level modulated data signals, such as four-level PAM, reduce the data signal rate therefore reducing insertion loss, power, complexity of the circuits and required chip real estate.

Vivek Telang

Papers

Higher-order modulation for client optics

Multi-rate backplane transceiver

Phase control for interleaved analog-to-digital conversion for electronic dispersion compensation

Electronic dispersion compensation utilizing interleaved architecture and channel identification for assisting timing recovery

Use of multi-level modulation signaling for short reach data communications