When mirror-polished, flat, and clean wafers of almost any material are brought into contact at room temperature, they are locally attracted to each other by van der Waals forces and adhere or bond. This phenomenon is referred to as wafer bonding. The most prominent applications of wafer bonding are silicon-on-insulator (SOI) devices, silicon-based sensors and actuators, as well as optical devices. The basics of wafer-bonding technology are described, including microcleanroom approaches, prevention of interface bubbles, bonding of III-V compounds, low-temperature bonding, ultra-high vacuum bonding, thinning methods such as smart-cut procedures, and twist wafer bonding for compliant substrates. Wafer bonding allows a new degree of freedom in design and fabrication of material combinations that previously would have been excluded because these material combinations cannot be realized by the conventional approach of epitaxial growth.

Semiconductor wafer bonding

Materials issues in microelectromechanical systems (MEMS)

In this paper III-V on silicon-on-insulator (SOI) het- erogeneous integration is reviewed for the realization of near infrared light sources on a silicon waveguide platform, suitable for inter-chip and intra-chip optical interconnects. Two bonding technologies are used to realize the III-V/SOI integration: one based on molecular wafer bonding and the other based on DVS- BCB adhesive wafer bonding. The realization of micro-disk lasers, Fabry-Perot lasers, DFB lasers, DBR lasers and mode- locked lasers on the III-V/SOI material platform is discussed. Artist impression of a multi-wavelength laser based on micro- disk cavities realized on a III-V/SOI heterogeneous platform and a microscope image of a realized structure.

III‐V/silicon photonics for on‐chip and intra‐chip optical interconnects

A process for producing a semiconductor article is provided which comprises the steps of bonding a film onto a substrate having a porous semiconductor layer, and separating the film from the substrate at the porous semiconductor layer by applying a force to the film in a peeling direction.

Process for producing semiconductor article

Wafer-to-wafer bonding processes for microstructure fabrication are categorized and described. These processes have an impact in packaging and structure design. Processes are categorized into direct bonds, anodic bonds, and bonds with intermediate layers. Representative devices using wafer-to-wafer bonding are presented. Processes and methods for characterization of a range of bonding methods are discussed. Opportunities for continued development are outlined.

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Wafer-to-wafer bonding for microstructure formation

Various approaches to wafer bonding technology are reviewed. Bonding kinetics are discussed as well as different mechanical and chemical thinning techniques. The structural and electrical qualities of state‐of‐the‐art bonded SOI silicon films and devices built in them are detailed. Problems faced by this technology are evaluated.

https://iopscience.iop.org/article/10.1149/1.2085575/pdf

W. P. Maszara

Papers

Silicon‐On‐Insulator by Wafer Bonding: A Review

Silicon-On-Insulator by Wafer Bonding: A Review