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Wen-Hann Wang
Researcher at Intel
Publications - 10
Citations - 354
Wen-Hann Wang is an academic researcher from Intel. The author has contributed to research in topics: Cache & Cache pollution. The author has an hindex of 7, co-authored 10 publications receiving 354 citations.
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Patent
Apparatus and method of handling race conditions in mesi-based multiprocessor system with private caches
TL;DR: In this article, a method for handling race conditions arising when multiple processors simultaneously write to a particular cache line is presented, where a determination is made as to whether the cache lines are in an exclusive, modified, invalid, or shared state.
Patent
Apparatus and method for caching lock conditions in a multi-processor system
Wen-Hann Wang,Konrad K. Lai,Gurbir Singh,Mandar S. Joshi,Nitin V. Sarangdhar,Matthew A. Fisch +5 more
TL;DR: In this article, the second processor queues its request in a buffer and checks the buffer for any outstanding requests, and transmits a signal to the first processor indicating that the data is now not locked.
Patent
Apparatus for maintaining multilevel cache hierarchy coherency in a multiprocessor computer system
Wen-Hann Wang,Konrad K. Lai,Gurbir Singh,Michael W. Rhodehamel,Nitin V. Sarangdhar,John M. Bauer,Mandar S. Joshi,Ashwani Kumar Gupta +7 more
TL;DR: In this article, a line of a cache has a present state comprising one of a plurality of line states, including modified (M), exclusive (E), shared (S), and invalid (I) states.
Patent
Cache line pre-load and pre-own based on cache coherence speculation
TL;DR: In this article, a cache management system comprising in various embodiment pre-load and pre-own functionality to enhance cache efficiency in shared memory distributed cache multiprocessor computer systems is presented.
Patent
Method and apparatus for cache memory replacement line identification
TL;DR: In this article, the authors propose a cache interface which provides a communication interface between a cache memory and a controller for the cache memory, including an address bus, a data bus, and a status bus.