Disclosed is a method for driving a plasma display panel in which a plurality of first electrodes and second electrodes are arranged parallel to each other, a plurality of third electrodes are arranged to cross the first and second electrodes, and discharge cells defined with areas in which the electrodes cross mutually are arranged in the form of a matrix According to the driving method, a reset period is a period during which the distribution of wall charges in the plurality of discharge cells is uniformed An addressing period is a period during which wall charges are produced in the discharge cells according to display data A sustain discharge period is a period during which sustain discharge is induced in the discharge cells in which wall charges are produced during the addressing period The driving method in accordance with the present invention comprises a step of applying a first pulse in which an applied voltage varies with time so as to induce first discharge in the lines defined by the first and second electrodes, and a step of applying a second pulse in which an applied voltage varies with time so as to induce second discharge as erase discharge in the lines defined by the first and second electrodes These steps are carried out during the reset period

Method for driving plasma display panel

The present invention relates to a method and apparatus for driving a plasma display panel that can be driven at a low voltage and prevent undesired discharge from being generated under high temperature environment.

Method and apparatus for driving plasma display panel

A plasma display device includes: a dielectric layer on which a plurality of through-holes of a dielectric layer is disposed in a matrix shape; upper and lower electrode layers formed at both upper and lower surfaces of the dielectric layer; upper and lower substrates disposed on the outer surface of the upper and lower electrode layers; and a third electrode layer having a plurality of third electrodes which are formed between the upper substrate and the upper electrode layer, or the lower substrate and the lower electrode layer, and are insulated from the upper and lower electrode layers. Accordingly, a plasma display device can be realized which has stability and efficiency of a micro discharge. In addition, each pixel can concurrently carry out a sustain discharge by applying an alternating voltage to upper and lower electrodes forming sustain electrodes.

Plasma Display Panel

PROBLEM TO BE SOLVED: To realize a high quality and stable display by effectively using a frame interval. SOLUTION: Temperature of the panel surface corresponding to a cell is measured and pulse widths W of driving voltage pulses Py and Pa are varied in accordance with the temperature variation. When the measured temperature is relatively low, a pulse width WL is made longer. When the measured temperature is high, a pulse width WH is made shorter. COPYRIGHT: (C)2002,JPO

Driving method of plasma display panel

A method for driving a plasma display panel including discharge cells formed at the intersections of the scan electrodes, maintaining electrodes, and data electrodes. One field consists of a plurality of sub fields, each having an initialization period, a write period, and a maintaining period. The maintaining period of at least one sub field has a first maintaining period during which the maintaining pulse has a first rise time and a second maintaining period during which the maintaining pulse has a second rise time shorter than the first rise time. The second maintaining period includes at least the final period of the maintaining period.

Plasma display panel drive method

PROBLEM TO BE SOLVED: To provide a high picture quality, more specifically high definition, gradation and brightness, enhanced display quality, and high contrast. SOLUTION: An electrode driving circuit performs interlaced scanning so that the odd- and even-numbered lines of surface-discharge electrode spacings L1 to L8 have their maintaining pulse voltage waveforms set in opposite phase to each other. Thus, when either the odd- or even-numbered line is displayed, the voltage applied to the other electrode spacing becomes zero, eliminating the need to provide bulkheads over the surface-discharge electrodes. As the surface-discharge electrodes, an X (X1 to X5) electrode is placed on each side of a Y (Y1 to Y4) electrode, and the display line of an odd-numbered frame is set between the Y electrode and the X electrode on one side and supplied with a maintaining pulse while the display line of an even- numbered frame is set between the Y electrode and the X electrode on the other side and supplied with a maintaining pulse. Blind lines are set at every other spacing between the surface-discharge electrodes, and at the blind lines, light emitted from a discharge is blocked or external light is absorbed. A plurality of address electrodes are arranged on one line of picture elements and are selectively connected to a pad thereon so that a plurality of the lines can be selected simultaneously.

Plasma display panel, its driving method, and plasma display device

PROBLEM TO BE SOLVED: To prevent picture quality from deteriorating in states of low and middle temperatures, to solve the problems in installation space and noise, and to eliminate redundant electric power, by controlling the physical value causing temperature rise to lower the temperature when the detected temperature of a driver exceeds a reference temperature. SOLUTION: An address driver circuit 30 comprises driver ICs 31-33, and assuming the number of outputs of each IC as N, the number of the driver ICs as M, the address driver circuit 30 can drive a display panel 20 having address lines of M×N main bodies at a maximum. And, each of the drivers IC31-33 has a temperature judgment output, and when the temperature judgment output of any one of the driver ICs becomes active, a predetermined control routine is started by a micro controller 25f of a control circuit 25. Namely, by controlling a physical value causing the temperature rise of the drivers CI31-33, for example, controlling a pulse power control circuit 25g, the level of an address electrode driving waveform is lowered in an address period.

Driving circuit for plane display device

PROBLEM TO BE SOLVED: To make further high gradation and brightness and better black display quality or high contrast. SOLUTION: Surface discharge electrodes containing X-electrodes and Y- electrodes are alternately arranged in parallel and shading masks 41-43 are formed alternately between the surface discharge electrodes to be blind rows B1-B3 so that discharge emission in the blind rows can be shaded. In a resetting period, voltage is applied between the electrodes constituting the blind rows B1-B3 so that voltage applied between the electrodes constituting display rows L1-L4 can be in-phase, to cause priming discharge. The surfaces on the observer' s side of the shading masks 41-43 are colored black, by which outside light is absorbed. Plural address electrodes are arranged in one picture element column and selectively connected to pads located thereon so that plural rows can be selected at the same time.

Plasma display panel and its driving method as well as plasma display device

PURPOSE:To accelerate a circuit operation and to reduce power consumption by improving the arrangement of a level conversion circuit and a power supply method for that when the constitution of the level conversion circuit provided between circuit systems with different kind of power source driving and also, they are integrated in the same chip. CONSTITUTION:This circuit is constituted in such a manner that an input transistor circuit 11 and first to fourth transistors T1-T4 are provided, and the circuit 11 is connected to a driving power source system VDD1, the GROUND, and an input part IN, and also, the circuit 11 is connected to each gate of the transistors T2, T4, and the transistors T1, T2 are connected to a driving power source VDD2 and the GROUND by connecting in series, and also, the transistors T3, T4 are connected to the driving power source VDD2 and the GROUND by connecting in series, and the gate of the transistor T1 is connected to an output part OUT2 which forms the serial connection point of the transistors T3 and T4, and the gate of the transistor T3 is connected to an output part OUT1 which forms the serial connection point of the transistors T1 and T2, and the circuit 11 is comprised of a latch circuit 11A which latch-outputs an input signal Sin.

Level converter and semiconductor integrated circuit

PROBLEM TO BE SOLVED: To provide a display panel capable of attaining high-speed addressing at a low voltage without reducing contrast by providing priming electrodes for forming priming cells on the outside of a display region, and shielding the luminescence there. SOLUTION: The plasma display panel of this plasma display device is provided with priming electrodes D1, D2 in parallel with a maintenance discharge electrode adjacently to the upper section of the second electrode Y1 constituting the maintenance discharge electrode of the first display line and priming electrodes D3, D4 in parallel with the maintenance discharge electrode adjacently to the lower section of the first electrode Xn constituting the maintenance discharge electrode of the final display line. When a voltage is applied across the priming electrodes D1, D2, a priming discharge occurs at a portion 41. Light shielding bodies are provided on the surface side of the priming electrodes D1, D2 and D3, D4 respectively, and the luminescence caused by the discharge is invisible. COPYRIGHT: (C)1998,JPO

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Papers

Plasma display panel, its driving method, and plasma display device

Driving circuit for plane display device

Plasma display panel and its driving method as well as plasma display device

Level converter and semiconductor integrated circuit

Plasma display panel, plasma display device, and driving method for plasma display panel

文孝 浅見

Papers

Plasma display panel, its driving method, and plasma display device

Driving circuit for plane display device

Plasma display panel and its driving method as well as plasma display device

Level converter and semiconductor integrated circuit

Plasma display panel, plasma display device, and driving method for plasma display panel

文孝浅見