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William F. Kraus
Researcher at Ramtron International
Publications - 16
Citations - 341
William F. Kraus is an academic researcher from Ramtron International. The author has contributed to research in topics: Ferroelectric capacitor & Node (circuits). The author has an hindex of 11, co-authored 16 publications receiving 341 citations.
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Patent
Bandgap reference based power-on detect circuit including a suppression circuit
TL;DR: In this article, a power-on detect circuit includes a resistor divider with a first node, a second node coupled to ground, and a center tap; a bandgap circuit for providing a reference voltage; a differential amplifier having a first input for receiving the reference voltage, and the second input coupled to the center tap of the bandgap reference voltage circuit, and an output for providing an output.
Patent
Ferroelectric non-volatile latch circuits
J. Eliason,William F. Kraus +1 more
TL;DR: In this paper, a nonvolatile ferroelectric latch includes a sense amplifier having at least one input/output coupled to a bit-line node and a load element coupled to the bitline node.
Patent
Ferroelectric nonvolatile random access memory utilizing self-bootstrapping plate line segment drivers
TL;DR: In this paper, the NMOS plate line segment drivers are coupled to a center portion of the corresponding plate line segments, and the plate line drivers are each coupled to the center portion this paper.
Patent
Bootstrapping circuit utilizing a ferroelectric capacitor
TL;DR: In this paper, a bootstrapping circuit is coupled between the word line and a boost line for receiving a boost signal, and the boost line transitions from zero volts to VDD such that the voltage on the selected word line is boosted to a voltage greater than the VDD power supply voltage.
Patent
Memory cell configuration for a 1T/1C ferroelectric memory
TL;DR: In this paper, a memory cell layout for use in a 1T/1C ferroelectric memory array is presented, which includes an access transistor having a gate coupled to a word line and a current path coupled between a bit line and an internal cell node.