The current status of VLSI layout and directions for future research are addressed, with emphasis on the authors' own work Necessary terminology and definitions and, whenever possible, a precise formulation of the problems are provided Placement and floorplanning for both the sea-of-gates and building-block designs are examined The former emphasizes the connectivity specification, whereas the latter must also consider module shape and size Global routing based on a method of successive cuts on a chip is discussed This is a hierarchical top-down approach that is useful for both of the above designs A two-dimensional detailed routing problem and the rip-up and rerouting problem are also discussed The field of computational geometry and its application to layout-in particular, to gridless routing and compaction-are reviewed, and layout engines are considered >

Recent advances in VLSI layout

Publisher Summary This chapter presents a survey on various parallel sorting algorithms. Sorting is a nontrivial problem and has widespread commercial and business applications. Serial algorithms for sorting have been available since the days of punched-card machines. At present, there is a considerable body of literature on serial sorting algorithms. Parallel algorithms for sorting are of a recent origin and came into existence over the past decade. The chapter presents a unified treatment of various parallel sorting algorithms by bringing out clearly the relation between the architecture of parallel computers and the structure of algorithms. In the design of parallel algorithms in general, and of parallel sorting algorithms in particular, two models have been widely used: (1) models based on fixed interconnection networks such as the same or single instruction on multiple data (SIMD) machine mesh-connected network and (2) models based on a global memory, which is shared by various processors. The special-purpose network-sorting algorithms are described. Algorithms for SIMD machines are given.

Parallel Sorting Algorithms

In this paper, we propose a taxonomy of parallel sorting that includes a broad range of array and file sorting algorithms. We analyze the evolution of research on parallel sorting, from the earliest sorting networks to the shared memory algorithms and the VLSI sorters. In the context of sorting networks, we describe two fundamental parallel merging schemes the odd-even and the bitonic merge. Sorting algorithms have been derived from these merging algorithms for parallel computers where processors communicate through interconnection networks such as the perfect shuffle, the mesh and a number of other sparse networks. After describing the network sorting algorithms, we show that, with a shared memory model of parallel computation, faster algorithms have been derived from parallel enumeration sorting schemes, where keys are first ranked and then rearranged according to their rank. Parallel sorting algorithms are evaluated according to a number of criteria, related not only to their time complexity, but also to their feasibility from a computer architecture point of view. We show that in addition to their attractive communication schemes, network sorting algorithms have non-adaptive schedules that make them suitable for implementation. In particular, they are easily generalized to block-sorting algorithms, that utilize limited parallelism to solve large sorting problems. We also address the problem of sorting large mass-storage files in parallel, using modified disk devices or intelligent bubble memories. Finally, the newer area of VLSI sorting is mentioned as an active and promising direction of research on parallel sorting.

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A taxonomy of parallel sorting

We consider a generalized version of Steiner's problem in graphs, motivated by the wire routing phase in physical VLSI design: given a connected, undirected distance graph with groups of required vertices and Steiner vertices, find a shortest connected subgraph containing at least one required vertex of each group We propose two efficient approximation algorithms computing different approximate solutions in time O(|E| + |V|log|V|) and in time O(g · (|E| + |V|log|V|)), respectively, where |E| is the number of edges in the given graph, |V| is the number of vertices, and g is the number of groups The latter algorithm propagates a set of wavefronts with different distances simultaneously through the graph; it is interesting in its own right

Beyond Steiner's Problem: A VLSI Oriented Generalization

We present a practical algorithm for finding minimum-length paths between points in the Euclidean plane with (not necessarily convex) polygonal obstacles. Prior to this work, the best known algorithm for finding the shortest path between two points in the plane required O(n2 log n) time and O(n2) space, where n denotes the number of obstacle edges. Assuming that a triangulation or a Voronoi diagram for the obstacle space is provided with the input (if is not, either one can be precomputed in O(n log n) time), we present an O(kn) time algorithm, where k denotes the number of “islands” (connected components) in the obstacle space. The algorithm uses only O(n) space and, given a source point s, produces an O(n) size data structure such that the distance between s and any other point x in the plane (x) is not necessarily an obstacle vertex or a point on an obstacle edge) can be computed in O(1) time. The algorithm can also be used to compute shortest paths for the movement of a disk (so that optimal movement for arbitrary objects can be computed to the accuracy of enclosing them with the smallest possible disk).

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Shortest paths in the plane with polygonal obstacles

We study the rectilinear shortest paths and minimum spanning tree (MST) problems for a set of points in the plane in the presence of rectilinear obstacles. We use the track graph, a suitably defined grid-like structure, to obtain efficient solutions for both problems. The track graph consists of rectilinear tracks defined by the obstacles and the points for which shortest paths and a minimum spanning tree are sought. We use a growth process like Dijkstra's on the track graph to find shortest paths from any point in the set to all other points (the one-to-all shortest paths problem). For the one-to-all shortest paths problem for n points we derive an O(n min {log n, log e} + (e + k) log t) time algorithm, where e is the total number of edges of all obstacles, t is the number of extreme edges of all obstacles, and k is the number of intersections among obstacle tracks (all bounds are for the worst case). The MST for the points is constructed also in time O(n log n + (e + k) log t) by a hybrid method of searching for shortest paths while simultaneously constructing an MST. An interesting application of the MST algorithm is the approximation of Steiner trees in graphs.

Rectilinear Shortest Paths and Minimum Spanning Trees in the Presence of Rectilinear Obstacles

Two generic record-permutation bubble devices—the bubble ladder and the bubble string comparator—have been reported in the literature but not yet implemented. The former relies on the extensive use of external control lines, while the latter relies solely on the interaction between bubbles. The ladder has evolved into an odd- even sorter and then a rebound sorter, but, uufortunately, it is operated by a large number of control lines. This paper shows that equally efficient but more versatile sorters can be constructed from the bubble string comparators without the control lines. Moreover, the new sorter—an up-down sorter—will be implemented in the recently invented high-density, high-speed, coil-less perforated-sheet bubble devices.

Wong

Papers

Rectilinear Shortest Paths and Minimum Spanning Trees in the Presence of Rectilinear Obstacles

An On-Chip Compare/Steer Bubble Sorter