In this paper, we propose a new lightweight block cipher called LBlock. Similar to many other lightweight block ciphers, the block size of LBlock is 64-bit and the key size is 80-bit. Our security evaluation shows that LBlock can achieve enough security margin against known attacks, such as differential cryptanalysis, linear cryptanalysis, impossible differential cryptanalysis and related-key attacks etc. Furthermore, LBlock can be implemented efficiently not only in hardware environments but also in software platforms such as 8-bit microcontroller. Our hardware implementation of LBlock requires about 1320 GE on 0.18 µm technology with a throughput of 200 Kbps at 100 KHz. The software implementation of LBlock on 8-bit microcontroller requires about 3955 clock cycles to encrypt a plaintext block.

/pdf/lblock-a-lightweight-block-cipher-3z7knn0zcf.pdf

LBlock: a lightweight block cipher

In this paper, we propose a new lightweight block cipher called LBlock. Similar to many other lightweight block ciphers, the block size of LBlock is 64-bit and the key size is 80-bit. Our security evaluation shows that LBlock can achieve enough security margin against known attacks, such as differential cryptanalysis, linear cryptanalysis, impossi- ble differential cryptanalysis and related-key attacks etc. Furthermore, LBlock can be implemented efficiently not only in hardware environ- ments but also in software platforms such as 8-bit microcontroller. Our hardware implementation of LBlock requires about 1320 GE on 0.18 µm technology with a throughput of 200 Kbps at 100 KHz. The software implementation of LBlock on 8-bit microcontroller requires about 3955 clock cycles to encrypt a plaintext block.

/pdf/lblock-a-lightweight-block-cipher-11bnrcykbr.pdf

LBlock: A Lightweight Block Cipher.

In this paper, we show structural cryptanalyses against two popular networks, i.e., the Feistel Network and the Substitute-Permutation Network (SPN). Our cryptanalyses are distinguishing attacks by an improved integral distinguisher. The integral distinguisher is one of the most powerful attacks against block ciphers, and it is usually constructed by evaluating the propagation characteristic of integral properties, e.g., the ALL or BALANCE property. However, the integral property does not derive useful distinguishers against block ciphers with non-bijective functions and bit-oriented structures. Moreover, since the integral property does not clearly exploit the algebraic degree of block ciphers, it tends not to construct useful distinguishers against block ciphers with low-degree functions. In this paper, we propose a new property called the division property, which is the generalization of the integral property. It can effectively construct the integral distinguisher even if the block cipher has non-bijective functions, bit-oriented structures, and low-degree functions. From viewpoints of the attackable number of rounds or chosen plaintexts, the division property can construct better distinguishers than previous methods. Although our attack is a generic attack, it can improve several integral distinguishers against specific cryptographic primitives. For instance, it can reduce the required number of chosen plaintexts for the \(10\)-round distinguisher on Keccak-\(f\) from \(2^{1025}\) to \(2^{515}\). For the Feistel cipher, it theoretically proves that Simon 32, 48, 64, 96, and 128 have \(9\)-, \(11\)-, \(11\)-, \(13\)-, and \(13\)-round integral distinguishers, respectively.

/pdf/structural-evaluation-by-generalized-integral-property-3bm4chslbg.pdf

Structural Evaluation by Generalized Integral Property

Differential and Higher Order Attacks.- A First-Order DPA Attack Against AES in Counter Mode with Unknown Initial Counter.- Gaussian Mixture Models for Higher-Order Side Channel Analysis.- Side Channel Cryptanalysis of a Higher Order Masking Scheme.- Random Number Generation and Device Identification.- High-Speed True Random Number Generation with Logic Gates Only.- FPGA Intrinsic PUFs and Their Use for IP Protection.- Logic Styles: Masking and Routing.- Evaluation of the Masked Logic Style MDPL on a Prototype Chip.- Masking and Dual-Rail Logic Don't Add Up.- DPA-Resistance Without Routing Constraints?.- Efficient Algorithms for Embedded Processors.- On the Power of Bitslice Implementation on Intel Core2 Processor.- Highly Regular Right-to-Left Algorithms for Scalar Multiplication.- MAME: A Compression Function with Reduced Hardware Requirements.- Collision Attacks and Fault Analysis.- Collision Attacks on AES-Based MAC: Alpha-MAC.- Secret External Encodings Do Not Prevent Transient Fault Analysis.- Two New Techniques of Side-Channel Cryptanalysis.- High Speed AES Implementations.- AES Encryption Implementation and Analysis on Commodity Graphics Processing Units.- Multi-gigabit GCM-AES Architecture Optimized for FPGAs.- Public-Key Cryptography.- Arithmetic Operators for Pairing-Based Cryptography.- FPGA Design of Self-certified Signature Verification on Koblitz Curves.- How to Maximize the Potential of FPGA Resources for Modular Exponentiation.- Implementation Cost of Countermeasures.- TEC-Tree: A Low-Cost, Parallelizable Tree for Efficient Defense Against Memory Replay Attacks.- Power Analysis Resistant AES Implementation with Instruction Set Extensions.- Security Issues for RF and RFID.- Power and EM Attacks on Passive RFID Devices.- RFID Noisy Reader How to Prevent from Eavesdropping on the Communication?.- RF-DNA: Radio-Frequency Certificates of Authenticity.- Special Purpose Hardware for Cryptanalysis.- CAIRN 2: An FPGA Implementation of the Sieving Step in the Number Field Sieve Method.- Collision Search for Elliptic Curve Discrete Logarithm over GF(2 m ) with FPGA.- A Hardware-Assisted Realtime Attack on A5/2 Without Precomputations.- Side Channel Analysis.- Differential Behavioral Analysis.- Information Theoretic Evaluation of Side-Channel Resistant Logic Styles.- Problems and Solutions for Lightweight Devices.- On the Implementation of a Fast Prime Generation Algorithm.- PRESENT: An Ultra-Lightweight Block Cipher.- Cryptographic Hardware and Embedded Systems - CHES 2007.

Cryptographic hardware and embedded systems : CHES 2007 : 9th International Workshop, Vienna, Austria, September 10-13, 2007 : proceedings

A survey on internet of vehicles: Applications, security issues & solutions

In this paper a new 9-round integral distinguisher of CLEFIA is proposed based on byte-pattern, which is proved in detail. Then by using the partial sum technique we improve the previous result on 11-round CLEFIA and proposed integral attack on 12-, 13- and 14- round CLEFIA with the whitening keys. The 12-round CLEFIA-128/192/256 is attacked with data complexity 2113 and time complexity 2116.7, 13-round CLEFIA-192/256 is attacked with data complexity 2113 and time complexity 2180.5, and 14-round CLEFIA-256 is breakable with data complexity 2113 and time complexity 2244.5. These results demonstrate that based on the byte-pattern we can improve the integral attacks on CLEFIA two more rounds than those given by the designers.

Improved integral attacks on reduced-round CLEFIA block cipher

The security of ARIA against integral attack is analyzed in this paper. First we modify the 3-round integral distinguishers proposed by Li et al., and by analyzing the property of the diffusion layer of ARIA we present new 4-round integral distinguishers. Moreover, based on the 4-round integral distinguishers and the partial sum technique we improve integral attack result on 6-round ARIA and propose integral attack on 7-round ARIA. The results are the best integral attack results on reduced-round ARIA so far.

Integral attacks on reduced-round ARIA block cipher

KLEIN is a lightweight block cipher proposed in RFIDSec 2011 which combines 4-bit S-box with Rijndael's byte-oriented MixColumn In this paper, we first investigate the security of KLEIN against truncated differential analysis We construct a 6-round truncated differential distinguisher based on a careful observation about the characteristic of KLEIN round function With the help of this new distinguisher, we give a truncated differential analysis of 8-round KLEIN-64 with the data complexity of 232 and time complexity of 2468 encryptions Furthermore, we study the security of KLEIN against integral analysis and present an integral analysis of 7-round KLEIN-64 and 8-round KLEIN-80 using a 5-round distinguisher, which is constructed by utilizing higher-order integral and higher-order differential properties

Cryptanalysis of reduced-round KLEIN block cipher

The 128-bit block cipher TWIS was proposed by Ojha et al in 2009. It is a lightweight block cipher and its design is inspired from CLEFIA. In this paper, we first study the properties of TWIS structure, and as an extension we also consider the generalized TWIS-type structure named G-TWIS cipher whose block size and round number are 4m and n repectively, where n and m are any positive integers. Then we present a series of 10-round differential distinguishers for TWIS and an n-round differential distinguisher for G-TWIS whose probabilities are all equal to 1. It shows that 10-round TWIS cipher and n-round G-TWIS cipher can be distinguished efficiently from random permutation.

Yanjun Li

Papers

Improved integral attacks on reduced-round CLEFIA block cipher

Integral attacks on reduced-round ARIA block cipher

Cryptanalysis of reduced-round KLEIN block cipher

Full-round differential attack on TWIS block cipher

Improved Integral Attacks on Reduced Round Camellia