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Yen-Kuang Chen
Researcher at Intel
Publications - 145
Citations - 3923
Yen-Kuang Chen is an academic researcher from Intel. The author has contributed to research in topics: Cache & Encoder. The author has an hindex of 32, co-authored 145 publications receiving 3806 citations. Previous affiliations of Yen-Kuang Chen include Lehigh University & University of Toronto.
Papers
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Proceedings ArticleDOI
Challenges and opportunities of internet of things
TL;DR: An overview of challenges and opportunities presented by the M2M Internet, where hundreds of billions of smart sensors and devices will interact with one another without human intervention, on a Machine-to-Machine (M2M) basis, are provided.
Journal ArticleDOI
Efficient implementation of sorting on multi-core SIMD CPU architecture
Jatin Chhugani,Anthony D. Nguyen,Victor W. Lee,William W. Macy,Mostafa Hagog,Yen-Kuang Chen,Akram Baransi,Sanjeev Kumar,Pradeep Dubey +8 more
TL;DR: An efficient implementation and detailed analysis of MergeSort on current CPU architectures, and performance scalability of the proposed sorting algorithm with respect to certain salient architectural features of modern chip multiprocessor (CMP) architectures, including SIMD width and core-count.
Proceedings ArticleDOI
The ALPBench benchmark suite for complex multimedia applications
TL;DR: The paper provides a performance characterization of the ALPBench benchmarks, with a focus on parallelism, and modified the original applications to expose thread-level and data-level parallelism using POSIX threads and sub-word SIMD instructions respectively.
Patent
System for providing a multimedia peer-to-peer computing platform
Matthew J. Holliman,Rainer Lienhart,Minerva M. Yeung,Yen-Kuang Chen,Igor Kozintsev,Li-Cheng Tai +5 more
TL;DR: In this article, the authors propose a method and apparatus to support a first peer node receiving an inquiry for data from a second peer node, where the transcoding includes converting the data into a format that can be processed by the second peer nodes.
Journal ArticleDOI
Implementation of H.264 encoder and decoder on personal computers
TL;DR: It is demonstrated that hardware-specific algorithm modifications can speed up the H.264 decoder and encoder substantially, and the performance improvement techniques on modern microprocessors demonstrated in this work can be applied not only to H.265, but also to other video or multimedia processing applications.