The effect of reduction in the terminal voltage of a grid-tied inverter together with minimization in total harmonic distortion (THD) of terminal voltage and current, in the presence of dead-band in the switching remains always challenging for the researchers. With high switching frequency, this issue increases by many folds. The grid-tied inverter used for harmonic compensation acts as a shunt active power filter (SAPF). The implementation of the dead-band elimination technique is based on output current polarity detection, suffers from multiple zero-crossing due to the generation of high frequency switching harmonics during SAPF operation. This paper deals with a dead band elimination methodology together with harmonic compensation using SAPF under non-linear and unbalanced loading conditions. Here, SAPF uses a dual fundamental component extraction (DFCE) scheme with modified complex coefficient filter (MCCF) to extract fundamental components for reference current generation to implement an indirect current control PWM scheme. MCCF extracts fundamental components even in the presence of dc offset and unbalancing at the input. For incorporating dead-band elimination in control, exact polarity detection is done separately through SAPF output current estimation using sensed load current, and modified CCF computed reference source current. Since the estimated SAPF output current contains no high-frequency switching harmonics, the dead-band elimination technique can be correctly implemented. To synchronize the zero-crossing of the estimated and actual SAPF current, an adaptive delay control is used. The proposed MCCF based control logic’s performance together with the dead-band elimination technique is validated for SAPF operating under non-linear, unbalance, and dynamic load conditions. The proposed dead-band elimination scheme based SAPF model is developed and simulated using MATLAB/ SIMULINK. The simulation results show a significant reduction in source current harmonics due to the elimination of odd harmonic injection into the system by incorporating dead-band elimination in SAPF operation. The real-time simulation of the proposed method is also validated using OPAL-RT OP4510 real-time platform.

Modified CCF Based Shunt Active Power Filter Operation With Dead-Band Elimination for Effective Harmonic and Unbalance Compensation in 3-Phase 3-Wire System

The advent of renewable energy resources and distributed energy systems herald a new set of challenges of power quality, efficient distribution, and stability in the power system. Furthermore, the power electronic converters integration has been increased in interfacing alternate energy systems and industries with the transmission and distribution grids. Owing to the intermittency of renewable energy resources and the application of power electronic converters the power distribution faces peculiar challenges. The dead-time effects are among the main challenges, which leads to the distortion of third harmonics, phase angle, torque pulsation, and induction motor current, causing severe quality problems for power delivery. To tackle these problems, this paper proposes a novel dead time compensation technique for improving the power quality parameters and improving the efficiency of power converters. The proposed model is simulated in MATLAB and the parametric equations are plotted against the corresponding parametric values. Furthermore, by implementing the proposed strategy, significant improvements are attained in the torque pulsation, speed, and total harmonic distortion of the induction motor. The comparisons are drawn between with and without dead time compensation technique, the former shows significant improvements in all aspects of the power quality parameters and power converters efficiency.

Improvement of Power Converters Performance by an Efficient Use of Dead Time Compensation Technique

Power electronics technology is still an emerging technology, and it has found its way into many applications, from renewable energy generation (i [...]

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Applications of Power Electronics

In this paper, a novel single-phase transformerless Z-source inverter (ZSI) derived from the basic SEPIC topology, which is named SEPIC-based ZSI, is proposed. The negative end of the input DC voltage of this topology is directly connected to the load and grounded, which can completely eliminate leakage current. Furthermore, this topology has some attractive characteristics such as buck–boost capability, impressive voltage gain, linear voltage gain is realized by a simple control method, and so on. The theoretical design and simulation results are demonstrated by corresponding experiments carried out on a 500 W laboratory prototype controlled by using a DSP TMS320F28335 controller combined with a FPGA SPARTAN-6.

https://www.mdpi.com/2079-9292/8/2/247/pdf

A Novel Three-Switch Z-Source SEPIC Inverter

For the grid-connected photovoltaic inverters, the switching-frequency common-mode voltage brings the leakage current, which should be eliminated. So far, many kinds of single-phase inverters have been published for this purpose, but most of them are the conventional voltage-type ones, which have the disadvantages of poor reliability due to the DC-link electrolytic capacitor and the risk of short-through of the bridge switches. To solve this technical issue, a novel current source inverter with AC-side clamping is proposed to mitigate the switching-frequency common-mode voltage. Meanwhile, a novel modulation method is proposed for the new single-phase inverter to achieve low-frequency operation of the main switches, which reduces the switching losses. Finally, the proposed method is implemented on the TMS320F28335DSP + XC6SLX9FPGA digital hardware platform. Also, the performance comparisons are done with the traditional solution. The results prove the proposed solution.

https://www.mdpi.com/2079-9292/8/11/1296/pdf

Current Source AC-Side Clamped Inverter for Leakage Current Reduction in Grid-Connected PV System

To prevent short-circuits between the upper and lower switches of power converters from over-current protection, the dead time is mandatory in the switching gating signal for voltage source converters. However, this results in many negative effects on system operations, such as output voltage and current distortions (e.g., increased level of fifth and seventh harmonics), zero-current-clamping phenomenon, and output fundamental-frequency voltage reduction. Many solutions have been presented to cope with this problem. First, the dead-time effect is analyzed by taking into account factors such as the zero-clamping phenomenon, voltage drops on diodes and transistors, and the parameters of inverter loads, as well as the parasitic nature of semiconductor switches. Second, the state-of-the-art dead-time compensation algorithms are presented in this paper. Third, the advantages and disadvantages of existing algorithms are discussed, together with the future trends of dead-time compensation algorithms. This article provides a complete scenario of dead-time compensation with control strategies for voltage source converters for researchers to identify suitable solutions based on demand and application.

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Yi Ji

Papers

Control strategies of mitigating dead-time effect on power converters: An overview