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Yibo Lin

Researcher at Peking University

Publications -  133
Citations -  1648

Yibo Lin is an academic researcher from Peking University. The author has contributed to research in topics: Computer science & Routing (electronic design automation). The author has an hindex of 16, co-authored 90 publications receiving 811 citations. Previous affiliations of Yibo Lin include University of Texas at Austin.

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Journal ArticleDOI

DREAMPlace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI Placement

TL;DR: A novel GPU-accelerated placement framework DREAMPlace is proposed, by casting the analytical placement problem equivalently to training a neural network, to achieve speedup in global placement without quality degradation compared to the state-of-the-art multithreaded placer RePlAce.
Proceedings ArticleDOI

DREAMPIace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI Placement

TL;DR: A novel GPU-accelerated placement framework DREAMPlace is proposed, by casting the analytical placement problem equivalently to training a neural network, to achieve over 30 times speedup in global placement without quality degradation compared to the state-of-the-art multi-threaded placer RePlAce.
Proceedings ArticleDOI

GeniusRoute: A New Analog Routing Paradigm Using Generative Neural Network Guidance

TL;DR: Experiments show that the proposed methodology obtains significant improvements over existing techniques and achieves competitive performance to manual layouts while being capable of generalizing to circuits of different functionality.
Proceedings ArticleDOI

MrDP: m ultiple- r ow d etailed p lacement of heterogeneous-sized cells for advanced nodes

TL;DR: The approach consists of a chain move scheme that generalizes the movement of heterogeneous-sized cells as well as a nested dynamic programming based approach for wirelength and density optimization, which demonstrates the effectiveness of these techniques in wirelength minimization and density smoothing.
Proceedings ArticleDOI

WellGAN: Generative-Adversarial-Network-Guided Well Generation for Analog/Mixed-Signal Circuit Layout

TL;DR: Experimental results show that the proposed generative adversarial network (GAN) guided well generation framework is able to generate wells close to manual designs with comparable post-layout circuit performance.