Showing papers by "Yoshihito Amemiya published in 1984"

Field effect transistor for integrated circuits

Abstract: PURPOSE:To obtain an FET with a minimum area by a method wherein a minimum workable dimension is applicable to a channel length and the width of a contact between a control electrode and a semiconductor substrate and also to a connection part of a wiring. CONSTITUTION:The length (l) of the channel region 2 of an FET is formed with a minimum workable dimension and, at the same time, the contact length between a control electrode 3 and an Si substrate 1 is made identical to the channel length (l) and also made identical to the end part of a high concentration carrier layer 9. Also, the control electrode 3 is extended to both sides in addition to the contact length with the substrate 1 and ride over a thick insulating films 10. The width (b) of the extended part is determined taking working allowance for mask alignment and wiring connections into account and is worked with the minimum dimension. The width of current input and output electrodes 4 and 5 are made to be equal to the width of the control electrode 3 and the wiring connection part 6 is provided at the center of the electrode 6 and the wiring connection parts 7 and 8 are provided also on the electrodes 4 and 5 as with the electrode 3. With this constitution, the FET can be produced with the extremely small size.