Showing papers presented at "Workshop On Computer Architecture Education in 1800"

The Progressive Learning Platform

Abstract: The progressive learning platform is an FPGA based computer architecture learning platform. It is intended to expose students to the a wider scope of computer architecture design principles beyond the usual topics covered in an undergraduate course. This includes the typical core concepts data path, control, pipelining, etc., with other additional, critical concepts such as full system integration, programmability, and other design trade-offs on a wider scope than the core architecture. This is accomplished with a problem-based curriculum that takes teams of students through a complete system on a chip (SoC) design. The included reference design includes a MIPS-like CPU with surrounding system components including a VGA controller with framebuffer, UART, gpio, switches, buttons, leds, interrupt controller, memory controller, and more all connected through a standard front side bus. The system is designed to be used with student generated designs. Additionally, software tools, including a simple 2-pass assembler, board communication tools, and a cycle accurate simulator are included. All host software tools are written in Java to be OS agnostic. The reference design is implemented in Verilog and is fully synthesizable in Xilinx Webpack ISE.