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Showing papers by "Teradyne published in 2021"


Proceedings ArticleDOI
Tao Wang1, Brian Brecht1
26 Jul 2021
TL;DR: This paper proposes a practical verification approach that jointly use different window functions, different bandwidth extractions to justify the correct locations and impedance values of the via structures.
Abstract: The time domain reflectometry (TDR) is a very popular tool for high speed link characterizations. However, its modeling and simulations for vias constantly face accuracy challenges due to vias’ small dimensions. While many existing papers discussed discontinuity analysis of transmission lines, in this paper, we focus on the accuracy control methods in TDR modeling and analysis for vias in PCBs for high speed signal integrity (SI). There are many practical factors affecting the via impedance result in TDR, such as frequency domain simulation setups, TDR window selections, discontinuities before and after via structures, etc. Based on the principle analysis, we proposed a practical verification approach that jointly use different window functions, different bandwidth extractions to justify the correct locations and impedance values of the via structures. The proposed method can also be used for other small.

2 citations


Proceedings ArticleDOI
14 Jun 2021
TL;DR: In this article, a soft switching non-inverting buck-boost converter is proposed, which uses a small film capacitor in parallel with the link inductor to provide zero voltage switching (ZVS).
Abstract: Non-inverting buck-boost converter is a classical topology that can provide wide range of voltage conversion and bidirectional power transfer; thus, it is frequently used in industrial applications. However, the conventional hard-switching configuration can only reach a high voltage conversion ratio at the expense of low efficiency due to switching loss. In this paper, a soft switching non-inverting buck-boost converter is proposed. This converter uses a small film capacitor in parallel with the link inductor to provide zero voltage switching (ZVS) by allowing the link capacitor and link inductor resonate between power transfer states. This paper presents the principles of the operation of this converter and verifies its performance through simulation and experiment.

1 citations


Patent
28 Jan 2021
TL;DR: In this article, a method and system for programming picking and placing of a workpiece is presented, associating the workpiece with an end effector that is attached to a robot.
Abstract: A method and system for programming picking and placing of a workpiece is provided. Embodiments may include associating a workpiece with an end effector that is attached to a robot and scanning the workpiece while the workpiece is associated with the end effector. Embodiments may also include determining a pose of the workpiece relative to the robot, based upon, at least in part, the scanning.

Patent
06 May 2021
TL;DR: In this article, an example method of stabilizing a voltage at a device under test (DUT) includes identifying one or more characteristics of a deviation in a first voltage to appear at the DUT.
Abstract: An example method of stabilizing a voltage at a device under test (DUT) includes identifying one or more characteristics of a deviation in a first voltage to appear at the DUT. The deviation may result from a digital signal and a concomitant transient current in the DUT. The digital signal may be part of a test flow to be sent over one or more test channels of automatic test equipment (ATE) to the DUT. The one or more characteristics may be identified prior to sending the test flow to the DUT. The method also includes generating a second voltage to apply to the DUT. The second voltage may be based on the one or more characteristics and being shaped to reduce the deviation.

Patent
04 Mar 2021
TL;DR: In this paper, an example test system includes an output stage to source at least one of voltage or current to a channel of a test instrument; a tracking circuit to detect a channel voltage following the output stage; and a controller to determine a power dissipation of output stage based on the supply voltage and the channel voltage.
Abstract: An example test system includes an output stage to source at least one of voltage or current to a channel of a test instrument; a tracking circuit to detect a channel voltage following the output stage and to control a supply voltage to the output stage based on the channel voltage; and a controller to determine a power dissipation of the output stage based on the supply voltage and the channel voltage, and to control the output stage based on the power dissipation in the output stage.

Patent
Luis Antonio Valiente1
11 Mar 2021
TL;DR: In this article, the authors describe a cover to shield a conductive trace on a surface of a circuit board from electromagnetic interference, where the cover encloses a volume over the trace, and contacts electrically connect the conductive surface of the cover to electrical ground on the circuit board.
Abstract: An example apparatus includes a cover to shield, at least partly, a conductive trace on a surface of a circuit board from electromagnetic interference. The cover includes a conductive surface that faces the conductive trace. The cover at least partly encloses a volume over the conductive trace. The volume is for holding air over the conductive trace. One or more contacts electrically connect the conductive surface of the cover to electrical ground on the circuit board.

Patent
19 Jan 2021
TL;DR: In this paper, a test system includes instruments for controlling testing and each instrument may be controlled by a processing unit, and each processing unit may be configured to operate on portions of a test program relevant to an instrument that the processing unit controls.
Abstract: An example test system includes instruments for controlling testing. Each instrument may be controlled by a processing unit. Each processing unit may be configured to operate on portions of a test program relevant to an instrument that the processing unit controls. A synchronization mechanism operates with at least some processing units to produce a synchronized sequence of actions, measurements, or measurements and actions at a test instrument interface absent intervention from a centralized controller.

Patent
28 Jan 2021
TL;DR: In this paper, a method and computing system comprising identifying one or more candidate objects for selection by a robot is presented, where a path to the candidate objects is determined based upon a robotic environment and at least one robotic constraint.
Abstract: A method and computing system comprising identifying one or more candidate objects for selection by a robot. A path to the one or more candidate objects may be determined based upon, at least in part, a robotic environment and at least one robotic constraint. A feasibility of grasping a first candidate object of the one or more candidate objects may be validated. If the feasibility is validated, the robot may be controlled to physically select the first candidate object. If the feasibility is not validated, at least one of a different grasping point of the first candidate object, a second path, or a second candidate object may be selected.