scispace - formally typeset
Search or ask a question

Showing papers in "Journal of Electronics Manufacturing in 1996"


Journal ArticleDOI
TL;DR: In this paper, a fractional factorial experiment was designed to determine the effects and interactions of stencil printing of solder paste, including printer settings, stencil aperture geometry, and environmental conditions.
Abstract: The stencil printing of solder paste is affected by a large number of factors, including printer settings, stencil aperture geometry, and environmental conditions. A fractional factorial experiment was designed to determine the effects and interactions of some of these parameters. A two-level design on eleven factors was used, with all main effects, two-way interactions and most three-way interactions estimable. The height of the solder paste deposit was measured at certain points on each of sixty-four boards. These measurements were analyzed using ANOVA and ANCOVA, and the most significant factors and interactions identified. The screening experiment presented here is part of a more detailed ongoing investigation of the factors controlling solder paste printing, funded by EPSRC.

42 citations


Journal ArticleDOI
TL;DR: In this article, the authors proposed a methodology for efficient process planning of concurrent machines in electronics assembly, which augments the benefits of the unique features of the HSCS assembly machine.
Abstract: This paper proposes a methodology for efficient process planning of concurrent machines in electronics assembly. The particular machine type under consideration is the High Speed Chip Shooter (HSCS) for surface mount assembly. Currently, most surface mount assembly operations are modeled in a cyclic manner. The model that is proposed herein is an asynchronous (acyclic) model that augments the benefits of the unique features of this assembly machine. A heuristic algorithm is developed, referred to as the Acyclic Assembly Time (AAT) algorithm, which is based on the asynchronous model. The algorithm is thoroughly tested with orthogonal arrays, compared against previously published problems, and applied to a real life example. The AAT algorithm produced excellent results throughout the test process. By increasing the utilization of the individual mechanisms, the efficiency of the overall system naturally improves and the ultimate goal of reducing the total assembly time is achieved.

40 citations


Journal ArticleDOI
TL;DR: A modeling methodology is presented which integrates a number of techniques to counter the commonly experienced problems of selecting the ‘right’ network structure, over-training and long training times in building economical and accurate ANN models.
Abstract: This paper addresses issues involved in the modeling of electronic manufacturing processes for optimization and control using artificial neural networks (ANNs). A modeling methodology is presented which integrates a number of techniques to counter the commonly experienced problems of selecting the ‘right’ network structure, over-training and long training times in building economical and accurate ANN models. This methodology has been implemented as an automated user-friendly ANN modeling software — CU-ANN. The main features of our methodology are data pre-processing, ‘simple to complex’ network structure approach and simultaneous training and testing. The neural networks considered have feed forward architecture and use error back-propagation algorithm for training. We have successfully applied this ANN modeling methodology to a number of simulated and real-life electronic manufacturing problems. These include stencil printing and simulated wafer fab. process data. The results indicate that our approach produces accurate, economical models and can handle a wide variety of data sets.

32 citations


Journal ArticleDOI
TL;DR: In this paper, two different heuristic methods are proposed, each with unique characteristics that have the potential to be beneficial to an assembly operation dependent upon the restrictions of the planning task.
Abstract: Surface Mount Technology (SMT) is a popular method of Printed Circuit Board (PCB) assembly in which high speed automated assembly machines are capable of placing in excess of 40,000 components per hour. In order to achieve these impressive assembly rates, complex placement machines must be programmed efficiently. Intrinsic to the configuration of these machines and the assembly process are some well established Operations Research problems. This paper addresses the feeder sequencing problem for an assembly machine with a sliding feeder rack in conjunction with a X-Y positioning table and a turret placement mechanism. This problem is a Quadratic Assignment Problem, and is proven to be - complete.1 Two different heuristic methods are proposed, each with unique characteristics that have the potential to be beneficial to an assembly operation dependent upon the restrictions of the planning task. One method is to assign feeder slots based on the transition between component types that naturally occur in the board placement path. The second method begins with an initial slot assignment and identifies exchanges between pairs of slots that generate improvements in the objective function. Minimizing the feeder travel distance over an assembly is the goal of each heuristic. A comparative analysis between the two heuristics is performed. Examples are presented and the attributes of each method are discussed. Arguments are presented to support “near-optimal” solutions to the problem. Given the complexities of the system, proper planning of the assembly process can take advantage of the independent control of each mechanism to create a natural relaxation of specific constraints.

31 citations


Journal ArticleDOI
TL;DR: In this article, the performance of vibrating squeegee for stencil printing of solder paste is analyzed and the effect of kinematic parameters such as printing speed, vibration amplitude and frequency are also discussed.
Abstract: The vibrating squeegee is considered by many to be one of the important developments in solder paste printing in recent years. The use of the vibrating squeegee for stencil printing of solder paste used for reflow soldering of surface-mount devices can provide several benefits. In this paper, the performance of vibrating squeegee for stencil printing of solder paste is analysed. It is shown that the vibrating squeegee could aid in the close packing of solder alloy particles, and also provide better solder paste roll in front of the squeegee. It is also shown that the vibration will produce a liquid-rich layer between the leading edge of the squeegee and the paste roll, thereby reducing the squeegee’s resistance to the paste roll. The behavior of the solder paste beneath the vibrating squeegee is analysed using oscillatory shear theory and data from oscillatory shear experiments on other dense suspensions. The effect of kinematic parameters such as printing speed, vibration amplitude and frequency are also discussed.

11 citations


Journal ArticleDOI
TL;DR: In this paper, the use of finite element method and finite difference method (FDM) for flow modeling of plastic quad flat package (PQFP) during automated transfer molding is discussed.
Abstract: This paper addresses the use of Finite Element Method (FEM) and Finite Difference Method (FDM) for flow modeling of plastic quad flat package (PQFP) during automated transfer molding. The use of such numerical methods, together with the analytical model, can predict accurately the filling profile, melt-front advancement and wire sweep of PQFP during the molding process. This work adopted a more utilitarian engineering assumption for the flow modeling of the molding process compared with other published work. Factors considered for the prediction are the ram-speed profile for filling and melt front advancement, while for wire sweep the die and basic leadframe structure are included. With these improved assumptions the numerical results obtained for filling, melt front advancement and wire sweep agree well with experimental measurements. Also, a Sweep Indicator (SWI) model is developed that indicates potential zones of extensive wire sweep. This improved modeling methodology can lead to better and more cost-effective designs of molds used for encapsulation of plastic integrated circuits. Such use of computer aided engineering (CAE) helps to address reliability problems such as wire sweep in integrated circuits before production. It allows for process optimization of the molding parameters.

9 citations


Journal ArticleDOI
TL;DR: In this article, the origins of post solder reflow defects are investigated and an interrelationship between solder bridges, insufficient and no solder (opens) is established, and simple response contours are constructed to determine the optimal combination of key screen printing parameters to give optimum solder paste thickness (i.e. at the nominal value) and minimize solder bridge variability.
Abstract: This paper addresses the origins of post solder reflow defects. In particular, an inter-relationship between solder bridges, insufficient and no solder (opens) is established. Simple response contours are also constructed to determine the optimal combination of key screen printing parameters to give optimum solder paste thickness (i.e. at the nominal value) and minimize solder bridge variability. Also a self-aligning mechanism using vibration that can be incorporated in to a reflow oven is also evaluated to address position-related soldering defects.

8 citations


Journal ArticleDOI
TL;DR: In this article, a review is made on studies related to direct liquid cooling channel flow for application to electronic systems and the scope covers single-phase flow over plain heaters, protruded heaters and enhanced surfaces.
Abstract: A review is made on studies related to direct liquid cooling channel flow for application to electronic systems. The scope covers single-phase flow over plain heaters, protruded heaters and enhanced surfaces. Protruded heaters and enhanced surfaces on the heater generally improve heat transfer. However, it is found that there are still inconsistent findings among results reported in the literature.

6 citations


Journal ArticleDOI
TL;DR: In this paper, a no-clean surface mount process for the assembly of Plastic Quad Flat Packs (PQFPs) with 15.7 mil (0.4 mm) pitch and 256 leads was established.
Abstract: A no-clean surface mount process for the assembly of Plastic Quad Flat Packs (PQFPs) with 15.7 mil (0.4 mm) pitch and 256 leads was established. The reliability of solder joints was assessed through accelerated life-time testing method. Samples were tested under a temperature cycling range of between –55°C and 125°C to study the microstructure change and fatigue life of solder joints. Observations of microstructure changes such as the growth of intermetallics, grain coarsening as well as thermal fatigue cracks were made. The cracks were seen to initiate particularly at heel and toe fillet regions of solder joints. The temperature cycling test results were then modeled by Weibull distribution, and the reliability and failure rate functions for the current surface mount solder joint process were determined. Under the temperature cycling test condition, the mean time to failure of the assembly was 7327 cycles. If operating under a temperature range of between 23° C and 99° C with one cycle per day, about 50% of the PQFPs were predicted to survive for about 15,753 cycles, or approximately 43 years.

4 citations


Journal ArticleDOI
TL;DR: In this article, a global system model was formulated to quantitatively determine the impact of each set of inputs on this objective function, and a computer-based simulation was used to estimate the lead to pad coverage.
Abstract: The effectiveness of the placement process in ultrafine pitch surface mount PWB assembly is influenced primarily by the accuracy of the Printed Wiring Boards (PWBs), the dimensional stability of the Surface Mount Components (SMCs), and the capability of the pick and place machine used. Engineers in a PWB assembly facility often need to evaluate the capability of their respective manufacturing processes (more specifically, their SMC placement process). Consequently, they need to understand the variations associated with the primary attributes of the PWBs, the SMCs and the placement equipment, and their impact on the yields of the placement process. This knowledge will guide the manufacturer in determining alternative courses of action which might improve process yields. This research attempted to understand how variations in the functional parameters of the PWBs, peripheral leaded SMCs and pick and place machines affect the objective function that was considered, namely the lead to pad coverage. A global system model was formulated to quantitatively determine the impact of each set of inputs on this objective function. Computer-based simulation was used to estimate the lead to pad coverage. This solution methodology provided a reasonable estimate of the distribution of the lead to pad coverage based on the specific PWB, SMCs and placement machine characteristic data. The software developed to simulate the placement process is user friendly. The output format used combines textual and graphical modes. The simulation software has been rigorously tested and verified, and found to provide excellent results.

4 citations


Journal ArticleDOI
TL;DR: In this paper, the effects of power dissipation, air velocity and ambient temperature on the thermal performance of a tape automated bonding (TAB) package were investigated in a custom-designed low speed wind tunnel.
Abstract: Thermal measurements play a very important role in the successful design and thermal management of electronic packages. Accurate measurements of temperature distribution under different conditions are necessary to characterize the thermal resistance of electronic packages from the chip junction to the cooling sink. This paper deals with the effects of power dissipation, air velocity and ambient temperature on the thermal performance of a tape automated bonding (TAB) package. In this study, the characteristics of junction temperature (TJ), junction to ambient thermal resistance (θJ-A), junction to case thermal resistance (θJ-C), and case to ambient thermal resistance (θC-A) are investigated in detail. The package was placed in a custom-designed low speed wind tunnel which allows the air velocity to be varied between 0.5 m/s and 5 m/s. Package surface temperatures were measured using infrared thermography, while chip junction temperatures were indirectly obtained using the Electrical Test Method (ETM) in accordance to Military Standard 883. The experimental results show that for the TAB package, air velocity significantly affects θC-A and θJ-A but has negligible effect on θJ-C· In contrast, θJ-C was found to be dependent on power dissipation. In addition, the ambient temperature was found to have a strong effect on the thermal performance of the TAB package. For the tested TAB package, it was noted that the inner lead temperatures are higher than that of the chip epoxy surface.

Journal ArticleDOI
TL;DR: In this paper, the authors used the Surface Evolver to understand the formation and stability of solder bridges and how these bridges may also result in adjacent lean or open circuit joints, and showed that shorts between pairs of pads are more stable than those between groups of three or more pads.
Abstract: This paper presents some preliminary results from the use of a computational modeling tool, The Surface Evolver, in order to understand the formation and stability of solder bridges and how these bridges may also result in adjacent lean or open circuit joints. The models show that shorts between pairs of pads are more stable than those between groups of three or more pads. It is also shown that, when a short become unstable, a single pad at the end of the group shorted will break away from the short and this pad will subsequently bear a much smaller volume of solder than will have originally been printed onto it. These models therefore indicate a possible mechanism for the observed phenomena of lean or open circuit joints occurring adjacent to shorts.

Journal ArticleDOI
TL;DR: An integrated decision-support environment is proposed, incorporating some of the design for disassembly and artificial intelligence techniques, to compute the cost/benefits of servicing, discarding or recycling an electronic pager.
Abstract: Environmental issues related to the life cycle of a product have forced companies, especially electronics companies, to adopt new strategies to stay competitive. Whereas until not so long ago environmental issues in manufacturing were considered, at best, as a cost overhead, today that perception has been radically altered. However, to address product life cycle issues, specific techniques and methods have to be understood and applied, for example, design for disassembly and artificial intelligence techniques. An integrated decision-support environment is proposed, incorporating some of these, to compute the cost/benefits of servicing, discarding or recycling an electronic pager. The pager was analyzed as, with an ever-increasing user-base, the social and political pressures for product “take-back” at the end of its useful life is expected to mount. The methodology entails first constructing a decision-tree of the disassembly sequence of the product, embodying the relevant material and disassembly costs. The decision to service, discard or recycle is reached based on a cost/benefit analysis of the alternative courses of action. If the alternatives are not clear-cut, or heuristic in nature, fuzzy logic is employed. The software tools, all visual, comprise Axon® Idea Processor, Decision Analysis by TreeAge (DATA™), and FuzzyTECH®.

Journal ArticleDOI
TL;DR: In this article, the authors focus on the control of component solderability by the wettability of the lead's geometrical design and its thermal demand with respect to flux kinetics, in order to reduce the number of open joints created during the manufacturing process.
Abstract: In the on-going drive for miniaturization, the overall design objective in electronics manufacturing is to achieve the best compromise between product performance, production cost (including rework), size, weight, quality and reliability. This has posed a major challenge to surface mount printed circuit board assembly processes. This paper focuses on the control of component solderability by the wettability of the lead’s geometrical design and its thermal demand with respect to flux kinetics, i.e. the movement of the contact line,1 in order to reduce the number of open joints created during the manufacturing process.

Journal ArticleDOI
TL;DR: In this paper, electrical data related to resistance drifts with thermal cycling, temperature, coefficients of resistance, and dispersion due to small joint geometries are analyzed. But the results show that the resistances are much higher than predicted by specified resistivities, but would be adequate for most applications.
Abstract: Electrically conductive adhesives have been used in place of solder for pin-through-hole attachment of dual-in-line IC packages. Joint resistances are much higher than predicted by specified resistivities, but would be adequate for most applications. Shear and fracture strengths are similar to those found for surface mount applications, and boards survive improvised impact testing. Much of the electrical data relates to resistance drifts with thermal cycling, temperature, coefficients of resistance, and dispersion due to small joint geometries.

Journal ArticleDOI
TL;DR: In this paper, the authors present an experimental correlation study of some common soldering defects, namely bridging and insufficient solder, to provide a link to computer simulation studies of the fundamental fluid mechanical phenomena within the soldering process.
Abstract: As lead spacings grow increasingly finer to support demands for ever higher densities in modern microelectronics circuitry, radical measures are needed to achieve consistent bridge-free assembly. This paper presents an experimental correlation study of some common soldering defects, namely bridging and insufficient solder, to provide a link to computer simulation studies of the fundamental fluid mechanical phenomena within the soldering process. Such studies can provide a scientific guide for stencil design and allow print pattern modification, to design against solder bridging and eliminate solder wicking as a result of bridging.

Journal ArticleDOI
TL;DR: In this article, an automatic process planning system for the manufacture of printed circuit boards is described, which can provide equivalent planning capabilities as manual process planner but can generate process plans in shorter time and the plans are found more consistent.
Abstract: Printed circuit boards (PCBs) are perhaps the most crucial components for electronic products and each product requires a proprietary circuit board. Because of today’s rapid introduction of new products, traditional manual methods of manufacturing information preparation and manufacturing of circuit boards are no longer acceptable. Therefore, the use of computer technology to assist design, planning and manufacture of PCBs is a logical move. This paper discusses the development of an automatic process planning system for the manufacture of printed circuit boards. The structure and functions of an automatic process planning system are described. Knowledge and databases are all modeled using object-oriented approach. Implementation experience shows that the system can provide equivalent planning capabilities as manual process planner but can generate process plans in shorter time and the plans are found to be more consistent.

Journal ArticleDOI
TL;DR: In this article, the authors present a mathematical model for the simulation of evaporating meniscus-driven dielectric coolant flow in a channel between two parallel flat plates, one of which is heated and simulates the I.C. chip surface to be cooled, and the other is assumed to be insulated for convenience of modelling.
Abstract: This paper presents a mathematical model for the simulation of evaporating meniscus-driven dielectric coolant flow in a channel between two parallel flat plates, one of which is heated and simulates the I.C. chip surface to be cooled, and the other is assumed to be insulated for convenience of modelling. The model comprises of the energy and momentum equations which incorporate the Young-Laplace equation for the driving force. The coolant rise length, velocity and capillary number are obtained for various coolants at different heat fluxes and channel inclinations. The data generated give the domain of feasibility of the concept and may be useful in the thermal design of electronics cooling.