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A Power Analysis Attack Against RSA-CRT
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TLDR
A side channel attack against RSA-CRT implementation, relative to MRED, could reduce the number of needed power traces and raise the attack efficiency.Abstract:
As a fast RSA implementation,RSA-CRT is widely applied to computing-limited devices,such as smart cards.This paper describes a side channel attack against RSA-CRT implementation.By properly choosing input data,the power consumption of the intermediate value after the modular reduction is analyzed.This attack first determines the size of one of the primes,then based on it,takes another DPA attack and gets the byte-by-byte prime.The simulation experiment shows that this attack is effective,and relative to MRED,could reduce the number of needed power traces and raise the attack efficiency.read more
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Hardware architecture for RSA cryptography based on residue number system
TL;DR: A parallel architecture for efficient hardware implementation of Rivest Shamir Adleman (RSA) cryptography is proposed and a simple and fast base transformation is used to achieve RNS Montgomery modular multiplication algorithm, which facilitates hardware implementation.
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A combinational power analysis method against cryptographic hardware
TL;DR: A new power model which combines Hamming Distance model and the model based on the template value of power consumption in combinational logic circuit is proposed, which can describe the power consumption characteristics of sequential logic circuits and those of comb multinational logic as well.
A Novel Method for Power Analysis Based on Combinational Logic in Block Cipher Circuit
TL;DR: A method that builds power model template according to input transi- tions of combinatorial logic circuit by computing its relation with the overall power consumption of a crypto- graphic circuit is proposed, which verifies the feasibility of the method and shows that the combinatorials logic is also faced with the problem of information leakage in power analysis cases.