Bi-cmos logic circuit

TLDR: In this paper, the authors proposed to reduce the through current by allowing both outputs of a flip flop whose outputs do not simultaneously go to the low potential level, to pass a CMOS logic part to drive a Bi-CMOS CONSTITUTION.

Abstract: PURPOSE:To considerably reduce the through current by allowing both outputs of a flip flop, whose both complementary outputs do not simultaneously go to the low potential level, to pass a CMOS logic part to drive a Bi-CMOS CONSTITUTION:First and second bipolar transistors TRs Q1 and Q2 longitudinally connected between power sources are driven by a CMOS logic output cd to obtain a logic output OUT in a connection part In this Bi-CMOS logic circuit, a flip flop(FF) 1 controlled by the logic input is provided in the input side Since a pair of logic gates 1a and 1b constituting the FF 1 controlled by an logic input IN form a crossing circuit where outputs of these gates are fed back to input sides of each other, both outputs (a) and (b) do not simultaneously go to the low potential level; and when both outputs are allowed to pass inverter gates 2a and 2b to drive TRs Q1 and Q2, TRs Q1 and Q2 are not simultaneously turned on, and the through current does not flow