Journal ArticleDOI
Characterization and correction of optical proximity effects in deep-ultraviolet lithography using behavior modeling
Anthony Yen,Alexander Tritchkov,John P. Stirniman,Geert Vandenberghe,Rik Jonckheere,Kurt G. Ronse,Luc Van den Hove +6 more
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TLDR
In this article, an empirically derived model for calculating feature sizes in resist is presented. But the model is based on convolution of the mask pattern with a set of kernels determined from measuring the printed test structures in resist.Abstract:
We present the characterization of optical proximity effects and their correction in deep‐UV lithography using an empirically derived model for calculating feature sizes in resist. The model is based on convolution of the mask pattern with a set of kernels determined from measuring the printed test structures in resist. The fit of the model to the measurement data is reviewed. The model is then used for proximity correction using commercially available proximity correction software. Corrections based on this model is effective in restoring resist linearity and in reducing line‐end shortening. It is also more effective in reducing optical proximity effects than corrections based only on aerial image calculations.read more
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Patent
Design rule checking system and method
TL;DR: In this paper, a method for performing rule checking on OPC corrected or otherwise corrected designs is described, which comprises accessing a corrected design and generating a simulated image, which corresponds to a simulation of an image which would be printed on a wafer if the wafer were exposed to an illumination source directed through the corrected design.
Patent
Data hierarchy layout correction and verification method and apparatus
TL;DR: In this paper, a method and apparatus for the correction of integrated circuit layouts for optical proximity effects which maintains the original true hierarchy of the original layout is provided, and also a method for the design rule checking of layouts which have been corrected for OPC effects.
Patent
General purpose shape-based layout processing scheme for IC layout modifications
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Patent
Dissection of printed edges from a fabrication layout for correcting proximity effects
Christophe Pierrat,Youping Zhang +1 more
TL;DR: In this paper, the first fabrication layout corresponds to the design layer that indicates target edges for a printed features layer, and then it is determined how to correct the edge for proximity effects based on the evaluation point.
Patent
Method and apparatus for reducing optical proximity correction output file size
TL;DR: In this article, an approach to reduce the size of an output file generated by an optical proximity correction (OPC) process is described, where an OPC output can be examined to identify identically sized segments with identical biases.