scispace - formally typeset
Patent

Data striping based switching system

TLDR
In this article, a switching system for a data stream utilizing striping with a parity stripe is presented, so if a fabric of the system fails, the data stream can still be reconstructed with the parity stripe.
Abstract
A switching system for a data stream utilizing striping with a parity stripe, so if a fabric of the system fails, the data stream can still be reconstructed with the parity stripe. The system uses receive and transmit interfaces which implement space division, and fabrics which implement hybrid space/time division.

read more

Citations
More filters
Patent

High-performance network switch

TL;DR: In this article, a digital switch has a plurality of blades coupled to a switching fabric via serial pipes, each blade outputs serial data streams with in-band control information in multiple stripes to the switching fabric.
Patent

System and method for high speed packet transmission implementing dual transmit and receive pipelines

Yuen Fai Wong
TL;DR: In this article, a first and second media access control (MAC) interfaces are used to facilitate receiving and transmission of packets over an associated set of physical interfaces, and a third FPGA is coupled to the first-and second memory structures and a backplane.
Patent

PROVISIONING SINGLE OR MULTISTAGE NETWORKS USING ETHERNET SERVICE INSTANCES (ESIs)

TL;DR: In this paper, the authors present a technique for provisioning single or multistage networks using Ethernet Service Instances (ESIs), a logical entity or object that stores information that may be used to provision a network.
Patent

Method and apparatus for distributed storage integrity processing

TL;DR: In this paper, a distributed storage integrity system in a dispersed storage network includes a scanning agent and a control unit, where the scanning agent identifies an encoded data slice that requires reconstruction, wherein the encoded slice is one of a plurality of encoded data slices generated from a data segment using an error encoding dispersal function.
Patent

System and method for router queue and congestion management

TL;DR: In this article, a multi-QOS level queuing structure is proposed, where packet payload pointers are stored in multiple queues and packet payloads in a common memory pool, and algorithms control the drop probability of packets entering the queue structure by comparing measured instantaneous queue size with calculated minimum and maximum queue sizes.
References
More filters
Patent

Methods for avoiding overcommitment of virtual capacity in a redundant hierarchic data storage system

TL;DR: In this article, a RAID management system dynamically migrates data between the mirror and parity RAID areas in a manner which optimizes performance and data reliability, which avoids over-commitment to the user.
Patent

Loosely coupled mass storage computer cluster

TL;DR: In this article, a method and apparatus redundantly store data, in particular video data objects, in a distributed computer system having at least three processor systems, each processor system being connected in point to point two way channel interconnection with each other processor system.
Patent

Video data streamer for simultaneously conveying same one or different ones of data blocks stored in storage node to each of plurality of communication nodes

TL;DR: In this paper, a media streamer includes at least one storage node, including mass storage for storing a digital representation of a video presentation, which is comprised of a plurality of mass storage units, and each data block stores data corresponding to approximately a T/N period of the video presentation.
Patent

Fibre channel switching system and method

TL;DR: In this paper, a modular Fibre Channel switch includes a data switching path and a message switching path to provide logical point-to-point connections between switch ports, where each switch port includes a frame logic circuit that allows for an arbitrary start of frame address, thus eliminating the need to buffer the data frame while waiting for a predetermined DRAM device to cycle in the time sliced protocol.
Patent

Method and means for managing RAID 5 DASD arrays having RAID DASD arrays as logical devices thereof

TL;DR: In this paper, a method and apparatus teaching insertion of addressing indirection to form and access an array hierarchy expressly permitting the concurrency of a high level RAID array, the bandwidth and degraded mode operation sustainable by a lower level RAID arrays, and after a DASD failure minimum spanning involvement when the array is rebuilding and rewriting missing data to a spare logical device.