Patent
High-voltage MOS transistor
Haruko Inoue,Yuichi Kitamura +1 more
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TLDR
In this article, a high-voltage MOS transistor with a gate insulating film was designed to maintain a high sustaining breakdown voltage, which is based on the voltage of the source offset region and a voltage of a substrate region.Abstract:
A high-voltage MOS transistor wherein a dopant concentration of a source offset region is set lower than a dopant concentration of a drain offset region whereby a resistance value of the resource region is set independently of a resistance value of the drain region in such a manner as to maintain a high sustaining breakdown voltage of the high-voltage MOS transistor, which is based on a voltage of the source offset region and a voltage of a substrate region directly under a gate insulating film during operation of the high-voltage MOS transistor.read more
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References
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Semiconductor device and method of manufacturing the same
TL;DR: In this article, the authors proposed a semiconductor device consisting of a substrate, a device isolation insulating film, a plurality of transistors arranged in the transistor region, and an anti-inversion diffusion layer under the device-isolation insulation film.
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TL;DR: In this article, the authors proposed to prevent the parasitic bipolar effect and the punch through by compensating a secondconductivity-type impurity by a first-conductivity type impurity whose concentration is increased near the surface.