Patent
Level shifter for use in active matrix display apparatus
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TLDR
In this paper, a pair of transistors connected in series, namely either transistors 11 and 14 or transistors 12 and 15, when one transistor turns ON, the other transistor turns OFF, is prevented.Abstract:
Between a positive power supply 18 and a negative power supply 19 , a p-channel transistor 11 and an n-channel transistor 14 are connected in series while a p-channel transistor 12 and an n-channel transistor 15 are also connected in series. An inverted input signal *Sig 1 is input to the respective gates of the transistors 11 and 14 , while an input signal Sigl is input to the respective gates of the transistors 12 and 15 . As a result, of a pair of the transistors connected in series, namely either the transistors 11 and 14 or the transistors 12 and 15 , when one transistor turns ON, the other transistor turns OFF. Thus, generation of through currents is prevented.read more
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References
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Patent
Level adjustment circuit and data output circuit thereof
TL;DR: In this paper, a level adjustment circuit was proposed for pulling up an output node, which included a MOS transistor, a first inverter for inputting an output data signal and outputting a gate control signal for controlling a gate electrode of the transistor, and a second inverter connected to the transistor between the first and second electrodes.
Patent
Latch circuit, shift register circuit and image display device operated with a low consumption of power
TL;DR: In this paper, a latch circuit LAT operates as a level shifter circuit when first and second control signals and the clock signal ck are at "H", and it operates as level hold circuit in any other case.
Patent
Integrated circuit for level shift
TL;DR: An integrated circuit for level shift is a parallel-connected circuit comprised of a first circuit including a first MOS FET of one conductive type, a third MOS FCET of another conductive Type and a first MCFET of the other conductive types which are series-connected in this order.
Patent
Level shift circuit
TL;DR: In this article, a level shift circuit is proposed, where an inverter is boosted in input voltage level by a voltage booster on the basis of the voltage of a capacitor element charged through a diode element.
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Drive circuit including two level-shift circuits
TL;DR: In this article, a drive circuit for an Electroluminesent display panel is described in which a ground line is divided into two lines, one for a signal input stage and the other one for signal output stage.