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Patent

Low latency floating-point divider

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TLDR
In this article, an improved method and apparatus for performing floating-point division is described, in which fractional operands are pre-scaled and an estimate of a reciprocal of the prescaled fractional divisor is obtained from a lookup table using a portion of the bits of the prior bits.
Abstract
An improved method and apparatus for performing floating-point division is disclosed. In a particular embodiment, fractional operands are pre-scaled and an estimate of a reciprocal of the pre-scaled fractional divisor is obtained from a lookup table using a portion of the bits of the pre-scaled fractional divisor. This value is used to scale the fractional operands and a multiply-add operation is used based on principles of series expansion to compute a final result with an acceptable degree of accuracy.

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Patent

Scheme for computing Montgomery division and Montgomery inverse realizing fast implementation

TL;DR: In this paper, a scheme for performing high speed Montgomery division within the Montgomery space was proposed, where the Montgomery inverse X =A -1 ·2 2n mod N for a positive integer N, a positive A which is relatively prime with respect to N and satisfying 0≦A
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TL;DR: In this article, a divider circuit for producing a quotient result within one cycle time is presented, which utilizes combinational circuitry for performing a division operation by computing a scaled reciprocal of the denominator, and multiplying the scaled output by a similarly scaled numerator.