Patent
Method and apparatus for error correction
Tsuneo Furuya,Katsuya Hori +1 more
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TLDR
In this paper, a method of error correction comprises error correction coding processing and interleaving and de-interleaving processings for digital subcoding data in subchannels (as opposed to the main channel) to be transmitted.Abstract:
A method of error correction comprises error correction coding processing and interleaving and de-interleaving processings for digital subcoding data (as opposed to main data) in subchannels (as opposed to the main channel) to be transmitted. Apparatus is provided comprising means for performing those processings. The method comprises the steps of dividing digital subcoding data in one PACKET into a plurality of PACKs; adding a first redundant code for error detection or error correction to each of the PACKs; and interleaving the digital subcoding data in each of the PACKs and the first redundant code; whereby the interleaved data is transmitted together with frame sync signals and main data. The data in the subchannels is coded and interleaved and then recorded so that the distances between the data are maximized. Therefore, if errors should occur, the interpolation can be properly done, thereby improving the error correcting ability without requiring complicated error correction circuit or large buffer memory such as those required for the data in the main channel.read more
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References
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Patent
Method and apparatus employing an improved format for recording and reproducing digital audio
TL;DR: The block/sub-block format as mentioned in this paper provides an inherent simplification of error correction techniques, and consists of dividing the digital audio data into groups of digital words, and recording alternate words on separate tracks in the medium Cyclic redundancy check characters, synchronization, and parity information are selectively interspersed with the data to define sub-blocks which in turn are combined into separate blocks of the block arrangement.
Patent
Encoding for error correction of recorded digital signals
Doi Toshitada,Kazami Shinichi +1 more
TL;DR: In this paper, the error-correcting bits are added to the original bits in intersecting sets in row-by-column relationship, and parity bits can also be formed simultaneously with the formation of the error correcting bits as extensions of the intersectioning sets.
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TL;DR: In this paper, a digital audio signal recorder for obtaining coded signals having a first check code generator for generating the sum of module 2 for each bit of pieces of predetermined sampled data; and further has a circuit operatively coupled to said generator for arranging the sampled data, a first code and a second check code at positions spaced on a time axis from each other.
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Takashi Takeuchi,Harukuni Kobari +1 more
TL;DR: In this paper, an error correcting circuit for audio equipment makes use of the so-called adjacent code correction technology and an error pointer generated by the error detection code (CRCC).