Method, system and device for realizing 32-bit integer division with high precision

TLDR: In this paper, a method for realizing 32-bit integer division with high precision is presented, where the precision of the quotient is effectively guaranteed, the output bit width is small, subsequent use is facilitated, and the error is smaller than one thousandth.

Abstract: The invention discloses a method for realizing 32-bit integer division with high precision. The method comprises the following steps that: inputting a first dividend and a first divisor into a zero judgment unit, and when the first dividend and the first divisor are not zero, allowing the zero judgment unit to output a second dividend and a second divisor; inputting the second dividend and the second divisor into a symbol extraction module, wherein the symbol extraction module outputs the symbol of a quotient, a third dividend and a third divisor; inputting the third dividend and the third divisor into a scaling module, scaling the third dividend and the third divisor, and outputting a fourth dividend, a fourth divisor, a third dividend scaling factor and a third divisor scaling factor; inputting the fourth dividend and the fourth divisor into a CORDIC iteration unit, updating the quotient and the initial value, and performing iteration; after the iteration is completed, allowing the CORDIC iteration unit to output the quotient to the result output unit, and allowing the result output unit to output the quotient and the scaling factors. The precision of the quotient is effectivelyguaranteed, the output bit width is small, the subsequent use is facilitated, and the error is smaller than one thousandth.